1 /******************************************************************************
2 * *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include "string.h"
21 #include "ixheaacd_sbr_common.h"
22 #include <ixheaacd_type_def.h>
23
24 #include <ixheaacd_type_def.h>
25 #include "ixheaacd_constants.h"
26 #include <ixheaacd_basic_ops32.h>
27 #include <ixheaacd_basic_ops16.h>
28 #include <ixheaacd_basic_ops40.h>
29 #include "ixheaacd_bitbuffer.h"
30 #include "ixheaacd_defines.h"
31 #include <ixheaacd_aac_rom.h>
32 #include "ixheaacd_pulsedata.h"
33
34 #include "ixheaacd_pns.h"
35 #include "ixheaacd_drc_data_struct.h"
36
37 #include "ixheaacd_lt_predict.h"
38
39 #include "ixheaacd_channelinfo.h"
40 #include "ixheaacd_drc_dec.h"
41 #include "ixheaacd_sbrdecoder.h"
42
43 #include "ixheaacd_audioobjtypes.h"
44 #include "ixheaacd_sbrdecsettings.h"
45 #include "ixheaacd_memory_standards.h"
46 #include "ixheaacd_error_codes.h"
47
48 #include "ixheaacd_defines.h"
49
50 #include "ixheaacd_sbr_scale.h"
51 #include "ixheaacd_lpp_tran.h"
52 #include "ixheaacd_env_extr_part.h"
53 #include <ixheaacd_sbr_rom.h>
54
55 #include "ixheaacd_hybrid.h"
56 #include "ixheaacd_ps_dec.h"
57 #include "ixheaacd_ps_bitdec.h"
58
59 #include "ixheaacd_pulsedata.h"
60
61 #include "ixheaacd_pns.h"
62
63 #include "ixheaacd_channelinfo.h"
64
65 #include "ixheaacd_env_extr.h"
66 #include "ixheaacd_common_rom.h"
67 #include "ixheaacd_block.h"
68 #include "ixheaacd_channel.h"
69 #include "ixheaacd_audioobjtypes.h"
70 #include "ixheaacd_latmdemux.h"
71 #include "ixheaacd_aacdec.h"
72 #include "ixheaacd_mps_polyphase.h"
73 #include "ixheaacd_config.h"
74 #include "ixheaacd_mps_dec.h"
75 #include "ixheaacd_struct_def.h"
76 #include "ixheaacd_headerdecode.h"
77
78 #include "ixheaacd_multichannel.h"
79
80 #include <ixheaacd_basic_op.h>
81 #include "ixheaacd_intrinsics.h"
82
83 static PLATFORM_INLINE UWORD32
ixheaacd_aac_showbits_7(ia_bit_buf_struct * it_bit_buff)84 ixheaacd_aac_showbits_7(ia_bit_buf_struct *it_bit_buff) {
85 UWORD8 *v = it_bit_buff->ptr_read_next;
86 UWORD32 b = 0;
87 UWORD32 x;
88 b = ((WORD32)v[0] << 8);
89 if (it_bit_buff->bit_pos < 6) {
90 b |= (WORD32)(v[1]);
91 }
92 x = (UWORD32)b << (15 + 8 - it_bit_buff->bit_pos);
93 x = (UWORD32)x >> (25);
94
95 return x;
96 }
97
ixheaacd_get_channel_mask(ia_exhaacplus_dec_api_struct * p_obj_enhaacplus_dec)98 WORD ixheaacd_get_channel_mask(
99 ia_exhaacplus_dec_api_struct *p_obj_enhaacplus_dec) {
100 WORD ixheaacd_drc_offset = 0, channel_mask = 0;
101 WORD flag1 = 0, flag2 = 0;
102 WORD ch_idx;
103 WORD *ptr_slot_element = p_obj_enhaacplus_dec->aac_config.slot_element;
104 WORD *ptr_element_type = p_obj_enhaacplus_dec->aac_config.element_type;
105
106 memset(ptr_slot_element, 0, sizeof(WORD) * MAX_BS_ELEMENT);
107
108 for (ch_idx = 0; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
109 if (ptr_element_type[ch_idx] == 1) {
110 channel_mask += 0x3;
111 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
112 ixheaacd_drc_offset += 2;
113 flag1 = ch_idx + 1;
114 break;
115 }
116 }
117
118 for (ch_idx = 0; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
119 if (ptr_element_type[ch_idx] == 0) {
120 channel_mask += 0x4;
121 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
122 ixheaacd_drc_offset += 1;
123 flag2 = ch_idx + 1;
124 break;
125 }
126 }
127 for (ch_idx = 0; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
128 if (ptr_element_type[ch_idx] == 3) {
129 channel_mask += 0x8;
130 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
131 ixheaacd_drc_offset += 1;
132 break;
133 }
134 }
135 for (ch_idx = flag1; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
136 if (ptr_element_type[ch_idx] == 1) {
137 channel_mask += 0x30;
138 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
139 ixheaacd_drc_offset += 2;
140 flag1 = ch_idx + 1;
141 break;
142 }
143 }
144 for (ch_idx = flag2; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
145 if (ptr_element_type[ch_idx] == 0) {
146 channel_mask += 0x100;
147 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
148 ixheaacd_drc_offset += 1;
149 break;
150 }
151 }
152 for (ch_idx = flag1; ch_idx < MAX_BS_ELEMENT; ch_idx++) {
153 if (ptr_element_type[ch_idx] == 1) {
154 {
155 channel_mask += (0x40 + 0x80);
156 ptr_slot_element[ch_idx] = ixheaacd_drc_offset;
157 ixheaacd_drc_offset += 2;
158 break;
159 }
160 }
161 }
162
163 return channel_mask;
164 }
165
ixheaacd_read_data_stream_element(ia_bit_buf_struct * it_bit_buff,WORD32 * byte_align_bits,ia_drc_dec_struct * drc_handle)166 VOID ixheaacd_read_data_stream_element(ia_bit_buf_struct *it_bit_buff,
167 WORD32 *byte_align_bits,
168 ia_drc_dec_struct *drc_handle) {
169 ia_bit_buf_struct temp_bs = {0};
170 WORD32 count = ixheaacd_read_bits_buf(it_bit_buff, 13);
171 WORD32 cnt = (count & 0xff);
172 WORD32 start_pos = 0;
173
174 if (cnt == 255) {
175 cnt += ixheaacd_read_bits_buf(it_bit_buff, 8);
176 }
177
178 if ((count & 0x0100) >> 8) {
179 ixheaacd_byte_align(it_bit_buff, byte_align_bits);
180 }
181
182 {
183 memcpy(&temp_bs, it_bit_buff, sizeof(ia_bit_buf_struct));
184 start_pos = temp_bs.cnt_bits;
185
186 if (ixheaacd_read_bits_buf(&temp_bs, 8) == DVB_ANC_DATA_SYNC_BYTE) {
187 int dmx_level_present, compression_present;
188 int coarse_gain_present, fine_grain_present;
189
190 ixheaacd_read_bits_buf(&temp_bs, 8);
191
192 ixheaacd_read_bits_buf(&temp_bs, 3);
193 dmx_level_present = ixheaacd_read_bits_buf(&temp_bs, 1);
194 ixheaacd_read_bits_buf(&temp_bs, 1);
195 compression_present = ixheaacd_read_bits_buf(&temp_bs, 1);
196 coarse_gain_present = ixheaacd_read_bits_buf(&temp_bs, 1);
197 fine_grain_present = ixheaacd_read_bits_buf(&temp_bs, 1);
198
199 if (dmx_level_present) ixheaacd_read_bits_buf(&temp_bs, 8);
200
201 if (compression_present) ixheaacd_read_bits_buf(&temp_bs, 16);
202
203 if (coarse_gain_present) ixheaacd_read_bits_buf(&temp_bs, 16);
204
205 if (fine_grain_present) ixheaacd_read_bits_buf(&temp_bs, 16);
206
207 if (!drc_handle->dvb_anc_data_present && temp_bs.cnt_bits >= 0) {
208 drc_handle->dvb_anc_data_pos = start_pos;
209 drc_handle->dvb_anc_data_present = 1;
210 }
211 }
212 }
213
214 if (it_bit_buff->cnt_bits < (cnt << 3)) {
215 longjmp(*(it_bit_buff->xaac_jmp_buf),
216 IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
217 }
218 it_bit_buff->ptr_read_next += cnt;
219 it_bit_buff->cnt_bits -= ((cnt) << 3);
220
221 }
222
ixheaacd_read_fill_element(ia_bit_buf_struct * it_bit_buff,ia_drc_dec_struct * drc_dummy,ia_drc_dec_struct * ptr_drc_dec)223 VOID ixheaacd_read_fill_element(ia_bit_buf_struct *it_bit_buff,
224 ia_drc_dec_struct *drc_dummy,
225 ia_drc_dec_struct *ptr_drc_dec) {
226 WORD32 count;
227 count = ixheaacd_read_bits_buf(it_bit_buff, 4);
228
229 if ((count - 15) == 0) {
230 count = ixheaacd_read_bits_buf(it_bit_buff, 8);
231 count = (count + 14);
232 }
233
234 if (count > 0) {
235 WORD32 extension_type;
236
237 extension_type = ixheaacd_read_bits_buf(it_bit_buff, 4);
238
239 if (extension_type == EXT_DYNAMIC_RANGE) {
240 ptr_drc_dec->drc_element_found = 1;
241 count -=
242 ixheaacd_dec_drc_read_element(ptr_drc_dec, drc_dummy, it_bit_buff);
243
244 } else {
245 ixheaacd_read_bits_buf(it_bit_buff, 4);
246
247 if (it_bit_buff->cnt_bits < ((count - 1) << 3)) {
248 longjmp(*(it_bit_buff->xaac_jmp_buf),
249 IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
250 }
251 it_bit_buff->ptr_read_next += count - 1;
252 it_bit_buff->cnt_bits -= ((count - 1) << 3);
253
254 }
255 }
256 }
257
ixheaacd_get_element_index_tag(ia_exhaacplus_dec_api_struct * p_obj_enhaacplus_dec,WORD ch_idx1,WORD * ch_idx,WORD * channel,WORD * ele_idx_order,WORD total_elements,WORD8 * element_used,WORD total_channels,ia_drc_dec_struct * pstr_drc_dec,ia_drc_dec_struct * drc_dummy)258 WORD32 ixheaacd_get_element_index_tag(
259 ia_exhaacplus_dec_api_struct *p_obj_enhaacplus_dec, WORD ch_idx1,
260 WORD *ch_idx, WORD *channel, WORD *ele_idx_order, WORD total_elements,
261 WORD8 *element_used, WORD total_channels, ia_drc_dec_struct *pstr_drc_dec,
262 ia_drc_dec_struct *drc_dummy) {
263 WORD element_tag, j;
264 ia_aac_dec_state_struct *p_state_enhaacplus_dec =
265 p_obj_enhaacplus_dec->p_state_aac;
266
267 ia_bit_buf_struct *it_bit_buff = p_state_enhaacplus_dec->ptr_bit_stream;
268 WORD element_idx;
269 WORD element_type;
270
271 ia_aac_decoder_struct *aac_dec_handle =
272 p_state_enhaacplus_dec->pstr_aac_dec_info[ch_idx1];
273
274 *ch_idx = ch_idx1;
275
276 if (p_state_enhaacplus_dec->bs_format != LOAS_BSFORMAT) {
277 if (ch_idx1 == 0) {
278 ixheaacd_byte_align(it_bit_buff, &aac_dec_handle->byte_align_bits);
279 }
280 }
281 {
282 if (ch_idx1 == 0) {
283 aac_dec_handle->byte_align_bits = it_bit_buff->cnt_bits;
284 }
285 }
286
287 if (it_bit_buff->cnt_bits < 3) {
288 it_bit_buff->cnt_bits = -1;
289 return (WORD16)(
290 (WORD32)IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
291 }
292
293 element_tag = (WORD)ixheaacd_read_bits_buf(it_bit_buff, 7);
294 ixheaacd_read_bidirection(it_bit_buff, -7);
295
296 element_idx = (element_tag & 0xF);
297 element_type = (element_tag >> 4) & 0x7;
298
299 p_obj_enhaacplus_dec->aac_config.str_prog_config.alignment_bits =
300 it_bit_buff->bit_pos;
301
302 while (element_type == 4 || element_type == 5 || element_type == 6) {
303 WORD type = (WORD)ixheaacd_read_bits_buf(it_bit_buff, 3);
304
305 if (it_bit_buff->cnt_bits < 3) {
306 it_bit_buff->cnt_bits = -1;
307 return (WORD16)(
308 (WORD32)IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
309 }
310
311 if (type == 4) {
312 ixheaacd_read_data_stream_element(
313 it_bit_buff, &aac_dec_handle->byte_align_bits, pstr_drc_dec);
314 }
315 if (type == 5) {
316 WORD32 error_code = 0;
317 error_code = ixheaacd_decode_pce(
318 it_bit_buff, &p_obj_enhaacplus_dec->aac_config.ui_pce_found_in_hdr,
319 &p_obj_enhaacplus_dec->aac_config.str_prog_config);
320 if (error_code != 0) {
321 if (error_code < 0) return error_code;
322 return IA_ENHAACPLUS_DEC_EXE_NONFATAL_DECODE_FRAME_ERROR;
323 }
324 }
325 if (type == 6) {
326 ixheaacd_read_fill_element(it_bit_buff, drc_dummy, pstr_drc_dec);
327 }
328
329 if (it_bit_buff->cnt_bits < 7) {
330 it_bit_buff->cnt_bits = -1;
331 return (WORD16)(
332 (WORD32)IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
333 }
334
335 element_tag = (WORD)ixheaacd_aac_showbits_7(it_bit_buff);
336 element_idx = (element_tag & 0xF);
337 element_type = (element_tag >> 4) & 0x7;
338 }
339
340 if (total_elements == 2 && total_channels == 2 &&
341 p_state_enhaacplus_dec->p_config->ui_pce_found_in_hdr == 2 &&
342 ch_idx1 == 0) {
343 ixheaacd_fill_prog_config_slots(p_state_enhaacplus_dec);
344 }
345
346 *channel = 1;
347 if (element_type == 1) {
348 *channel = 2;
349 }
350
351 for (j = 0; j < total_elements; j++) {
352 if (p_obj_enhaacplus_dec->aac_config.element_type[j] == element_type &&
353 (element_idx == ele_idx_order[j]) && (element_used[j] == 0)) {
354 *ch_idx = j;
355 element_used[j] = 1;
356 break;
357 }
358 }
359
360 if (j == total_elements) {
361 if (it_bit_buff->cnt_bits < 0) {
362 return (WORD16)(
363 (WORD32)IA_ENHAACPLUS_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES);
364 }
365
366 ixheaacd_read_bidirection(
367 it_bit_buff, (WORD16)(it_bit_buff->cnt_bits - it_bit_buff->size));
368 return IA_ENHAACPLUS_DEC_EXE_NONFATAL_ELE_INSTANCE_TAG_NOT_FOUND;
369 } else
370 return 0;
371 }
372