1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 *
4 * Common functions for OMAP4/5 based boards
5 *
6 * (C) Copyright 2010
7 * Texas Instruments, <www.ti.com>
8 *
9 * Author :
10 * Aneesh V <aneesh@ti.com>
11 * Steve Sakoman <steve@sakoman.com>
12 */
13 #include <common.h>
14 #include <debug_uart.h>
15 #include <spl.h>
16 #include <asm/arch/sys_proto.h>
17 #include <linux/sizes.h>
18 #include <asm/emif.h>
19 #include <asm/omap_common.h>
20 #include <linux/compiler.h>
21 #include <asm/system.h>
22
23 DECLARE_GLOBAL_DATA_PTR;
24
do_set_mux(u32 base,struct pad_conf_entry const * array,int size)25 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
26 {
27 int i;
28 struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
29
30 for (i = 0; i < size; i++, pad++)
31 writew(pad->val, base + pad->offset);
32 }
33
set_mux_conf_regs(void)34 static void set_mux_conf_regs(void)
35 {
36 switch (omap_hw_init_context()) {
37 case OMAP_INIT_CONTEXT_SPL:
38 set_muxconf_regs();
39 break;
40 case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
41 break;
42 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
43 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
44 set_muxconf_regs();
45 break;
46 }
47 }
48
cortex_rev(void)49 u32 cortex_rev(void)
50 {
51
52 unsigned int rev;
53
54 /* Read Main ID Register (MIDR) */
55 asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
56
57 return rev;
58 }
59
omap_rev_string(void)60 static void omap_rev_string(void)
61 {
62 u32 omap_rev = omap_revision();
63 u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
64 u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
65 u32 major_rev = (omap_rev & 0x00000F00) >> 8;
66 u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
67
68 const char *sec_s, *package = NULL;
69
70 switch (get_device_type()) {
71 case TST_DEVICE:
72 sec_s = "TST";
73 break;
74 case EMU_DEVICE:
75 sec_s = "EMU";
76 break;
77 case HS_DEVICE:
78 sec_s = "HS";
79 break;
80 case GP_DEVICE:
81 sec_s = "GP";
82 break;
83 default:
84 sec_s = "?";
85 }
86
87 #if defined(CONFIG_DRA7XX)
88 if (is_dra76x()) {
89 switch (omap_rev & 0xF) {
90 case DRA762_ABZ_PACKAGE:
91 package = "ABZ";
92 break;
93 case DRA762_ACD_PACKAGE:
94 default:
95 package = "ACD";
96 break;
97 }
98 }
99 #endif
100
101 if (soc_variant)
102 printf("OMAP");
103 else
104 printf("DRA");
105 printf("%x-%s ES%x.%x", omap_variant, sec_s, major_rev, minor_rev);
106 if (package)
107 printf(" %s package\n", package);
108 else
109 puts("\n");
110 }
111
112 #ifdef CONFIG_SPL_BUILD
spl_display_print(void)113 void spl_display_print(void)
114 {
115 omap_rev_string();
116 }
117 #endif
118
srcomp_enable(void)119 void __weak srcomp_enable(void)
120 {
121 }
122
123 /**
124 * do_board_detect() - Detect board description
125 *
126 * Function to detect board description. This is expected to be
127 * overridden in the SoC family board file where desired.
128 */
do_board_detect(void)129 void __weak do_board_detect(void)
130 {
131 }
132
133 /**
134 * vcores_init() - Assign omap_vcores based on board
135 *
136 * Function to pick the vcores based on board. This is expected to be
137 * overridden in the SoC family board file where desired.
138 */
vcores_init(void)139 void __weak vcores_init(void)
140 {
141 }
142
s_init(void)143 void s_init(void)
144 {
145 }
146
147 /**
148 * init_package_revision() - Initialize package revision
149 *
150 * Function to get the pacakage information. This is expected to be
151 * overridden in the SoC family file where desired.
152 */
init_package_revision(void)153 void __weak init_package_revision(void)
154 {
155 }
156
157 /**
158 * early_system_init - Does Early system initialization.
159 *
160 * Does early system init of watchdog, muxing, andclocks
161 * Watchdog disable is done always. For the rest what gets done
162 * depends on the boot mode in which this function is executed when
163 * 1. SPL running from SRAM
164 * 2. U-Boot running from FLASH
165 * 3. U-Boot loaded to SDRAM by SPL
166 * 4. U-Boot loaded to SDRAM by ROM code using the
167 * Configuration Header feature
168 * Please have a look at the respective functions to see what gets
169 * done in each of these cases
170 * This function is called with SRAM stack.
171 */
early_system_init(void)172 void early_system_init(void)
173 {
174 init_omap_revision();
175 hw_data_init();
176 init_package_revision();
177
178 #ifdef CONFIG_SPL_BUILD
179 if (warm_reset())
180 force_emif_self_refresh();
181 #endif
182 watchdog_init();
183 set_mux_conf_regs();
184 #ifdef CONFIG_SPL_BUILD
185 srcomp_enable();
186 do_io_settings();
187 #endif
188 setup_early_clocks();
189 #ifdef CONFIG_SPL_BUILD
190 /*
191 * Save the boot parameters passed from romcode.
192 * We cannot delay the saving further than this,
193 * to prevent overwrites.
194 */
195 save_omap_boot_params();
196 #endif
197 do_board_detect();
198 #ifdef CONFIG_SPL_BUILD
199 spl_early_init();
200 #endif
201 vcores_init();
202 #ifdef CONFIG_DEBUG_UART_OMAP
203 debug_uart_init();
204 #endif
205 prcm_init();
206 }
207
208 #ifdef CONFIG_SPL_BUILD
board_init_f(ulong dummy)209 void board_init_f(ulong dummy)
210 {
211 early_system_init();
212 #ifdef CONFIG_BOARD_EARLY_INIT_F
213 board_early_init_f();
214 #endif
215 /* For regular u-boot sdram_init() is called from dram_init() */
216 sdram_init();
217 gd->ram_size = omap_sdram_size();
218 }
219 #endif
220
arch_cpu_init_dm(void)221 int arch_cpu_init_dm(void)
222 {
223 early_system_init();
224 return 0;
225 }
226
227 /*
228 * Routine: wait_for_command_complete
229 * Description: Wait for posting to finish on watchdog
230 */
wait_for_command_complete(struct watchdog * wd_base)231 void wait_for_command_complete(struct watchdog *wd_base)
232 {
233 int pending = 1;
234 do {
235 pending = readl(&wd_base->wwps);
236 } while (pending);
237 }
238
239 /*
240 * Routine: watchdog_init
241 * Description: Shut down watch dogs
242 */
watchdog_init(void)243 void watchdog_init(void)
244 {
245 struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
246
247 writel(WD_UNLOCK1, &wd2_base->wspr);
248 wait_for_command_complete(wd2_base);
249 writel(WD_UNLOCK2, &wd2_base->wspr);
250 }
251
252
253 /*
254 * This function finds the SDRAM size available in the system
255 * based on DMM section configurations
256 * This is needed because the size of memory installed may be
257 * different on different versions of the board
258 */
omap_sdram_size(void)259 u32 omap_sdram_size(void)
260 {
261 u32 section, i, valid;
262 u64 sdram_start = 0, sdram_end = 0, addr,
263 size, total_size = 0, trap_size = 0, trap_start = 0;
264
265 for (i = 0; i < 4; i++) {
266 section = __raw_readl(DMM_BASE + i*4);
267 valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
268 (EMIF_SDRC_ADDRSPC_SHIFT);
269 addr = section & EMIF_SYS_ADDR_MASK;
270
271 /* See if the address is valid */
272 if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
273 (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
274 size = ((section & EMIF_SYS_SIZE_MASK) >>
275 EMIF_SYS_SIZE_SHIFT);
276 size = 1 << size;
277 size *= SZ_16M;
278
279 if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
280 if (!sdram_start || (addr < sdram_start))
281 sdram_start = addr;
282 if (!sdram_end || ((addr + size) > sdram_end))
283 sdram_end = addr + size;
284 } else {
285 trap_size = size;
286 trap_start = addr;
287 }
288 }
289 }
290
291 if ((trap_start >= sdram_start) && (trap_start < sdram_end))
292 total_size = (sdram_end - sdram_start) - (trap_size);
293 else
294 total_size = sdram_end - sdram_start;
295
296 return total_size;
297 }
298
299
300 /*
301 * Routine: dram_init
302 * Description: sets uboots idea of sdram size
303 */
dram_init(void)304 int dram_init(void)
305 {
306 sdram_init();
307 gd->ram_size = omap_sdram_size();
308 return 0;
309 }
310
311 /*
312 * Print board information
313 */
checkboard(void)314 int checkboard(void)
315 {
316 puts(sysinfo.board_string);
317 return 0;
318 }
319
320 #if defined(CONFIG_DISPLAY_CPUINFO)
321 /*
322 * Print CPU information
323 */
print_cpuinfo(void)324 int print_cpuinfo(void)
325 {
326 puts("CPU : ");
327 omap_rev_string();
328
329 return 0;
330 }
331 #endif
332