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Searched defs:opc (Results 1 – 25 of 85) sorted by relevance

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/external/mesa3d/src/gallium/drivers/r600/
Dr600_isa.c560 unsigned opc; in r600_isa_init() local
573 unsigned opc = op->opcode[isa->hw_class]; in r600_isa_init() local
581 unsigned opc = op->opcode[isa->hw_class]; in r600_isa_init() local
/external/wpa_supplicant_8/src/crypto/
Dmilenage.c36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f1()
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f2345()
173 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, in milenage_generate()
208 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, in milenage_auts()
235 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) in gsm_milenage()
270 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, in milenage_check()
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUInstrInfo.cpp33 unsigned opc = I->getOpcode(); in isUncondBranch() local
42 unsigned opc = I->getOpcode(); in isCondBranch() local
145 unsigned opc; in storeRegToStackSlot() local
180 unsigned opc; in loadRegFromStackSlot() local
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_info.c43 #define OPCODE_GAP(opc) { .opcode = opc }, argument
77 #define OPCODE_GAP(opc) "UNK" #opc, argument
/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_disasm.c38 uint32_t opc : 6; member
459 #define OPC(opc) [INST_OPCODE_##opc] = {#opc, print_opc_default} argument
460 #define OPC_MOV(opc) [INST_OPCODE_##opc] = {#opc, print_opc_mov} argument
461 #define OPC_TEX(opc) [INST_OPCODE_##opc] = {#opc, print_opc_tex} argument
462 #define OPC_IMM(opc) [INST_OPCODE_##opc] = {#opc, print_opc_imm} argument
523 const unsigned opc = instr->opc | (instr->opcode_bit6 << 6); in print_instr() local
/external/v8/src/wasm/
Dwasm-opcodes.cc411 #define CASE(name, opc, sig) opcode == opc ? kSigEnum_##sig: in operator ()() argument
420 #define CASE(name, opc, sig) opcode == opc ? kSigEnum_##sig: in operator ()() argument
428 #define CASE(name, opc, sig) opcode == (opc & 0xFF) ? kSigEnum_##sig: in operator ()() argument
437 #define CASE(name, opc, sig) opcode == (opc & 0xFF) ? kSigEnum_##sig: in operator ()() argument
445 #define CASE(name, opc, sig) opcode == (opc & 0xFF) ? kSigEnum_##sig: in operator ()() argument
465 #define CASE(name, opc, sig) opcode == opc ? &kSig_##sig: in operator ()() argument
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/
DNios2InstrInfo.cpp49 unsigned opc = Subtarget.hasNios2r2() ? Nios2::ADD_R2 : Nios2::ADD_R1; in copyPhysReg() local
/external/mesa3d/src/gallium/drivers/freedreno/a2xx/
Dfd2_compiler.c737 struct tgsi_full_instruction *inst, unsigned opc) in translate_tex()
833 struct tgsi_full_instruction *inst, unsigned opc) in translate_sge_slt()
878 unsigned opc) in translate_lrp()
918 unsigned opc) in translate_trig()
982 unsigned opc = inst->Instruction.Opcode; in translate_instruction() local
Ddisasm-a2xx.c129 #define INSTR(opc, num_srcs) [opc] = { num_srcs, #opc } argument
439 #define INSTR(opc, name, fxn) [opc] = { name, fxn } argument
555 #define INSTR(opc, fxn) [opc] = { #opc, fxn } argument
Dinstr-a2xx.h212 instr_cf_opc_t opc : 4; member
221 instr_cf_opc_t opc : 4; member
234 instr_cf_opc_t opc : 4; member
243 instr_cf_opc_t opc : 4; member
253 instr_cf_opc_t opc : 4; member
312 instr_fetch_opc_t opc : 5; member
346 instr_fetch_opc_t opc : 5; member
381 instr_fetch_opc_t opc : 5; member
/external/mesa3d/src/gallium/drivers/freedreno/ir3/
Ddisasm-a3xx.c793 uint16_t opc; member
797 #define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat } argument
972 uint32_t opc = instr_opc(instr); in print_instr() local
Dinstr-a3xx.h35 #define _OPC(cat, opc) (((cat) << NOPC_BITS) | opc) argument
216 #define opc_cat(opc) ((int)((opc) >> NOPC_BITS)) argument
217 #define opc_op(opc) ((unsigned)((opc) & ((1 << NOPC_BITS) - 1))) argument
316 uint32_t opc : 4; member
422 uint32_t opc : 6; member
482 uint32_t opc : 4; member
539 uint32_t opc : 6; member
588 uint32_t opc : 5; member
719 uint32_t opc : 5; member
738 uint32_t opc : 4; /* presumed, but only a couple known OPCs */ member
[all …]
Dir3.c778 opc_t opc, int nreg) in ir3_instr_create2()
787 struct ir3_instruction * ir3_instr_create(struct ir3_block *block, opc_t opc) in ir3_instr_create()
/external/u-boot/drivers/mmc/
Dsh_mmcif.c337 u32 opc = cmd->cmdidx; in sh_mmcif_set_cmd() local
405 struct mmc_data *data, u16 opc) in sh_mmcif_data_trans()
436 u32 opc = cmd->cmdidx; in sh_mmcif_start_cmd() local
Dsh_sdhi.c477 struct mmc_data *data, unsigned short opc) in sh_sdhi_set_cmd()
500 struct mmc_data *data, unsigned short opc) in sh_sdhi_data_trans()
536 unsigned short shcmd, opc = cmd->cmdidx; in sh_sdhi_start_cmd() local
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_emit_nvc0.cpp392 CodeEmitterNVC0::emitForm_A(const Instruction *i, uint64_t opc) in emitForm_A()
437 CodeEmitterNVC0::emitForm_B(const Instruction *i, uint64_t opc) in emitForm_B()
466 CodeEmitterNVC0::emitForm_S(const Instruction *i, uint32_t opc, bool pred) in emitForm_S()
1861 uint32_t opc; in emitSTORE() local
1908 uint32_t opc; in emitLOAD() local
2043 uint64_t opc; in emitMOV() local
2251 uint64_t opc; in emitSUCalc() local
2506 uint64_t opc = 0x4; in emitVSHL() local
/external/autotest/client/cros/cellular/
Dprologix_scpi_driver_test_noautorun.py184 def _get_idns_and_verify(self, instruments, opc=False): argument
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
DARMAsmBackend.cpp241 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 in adjustFixupValue() local
254 unsigned opc = 0; in adjustFixupValue() local
/external/libunwind/include/tdep-ia64/
Dscript.h36 unsigned int opc; /* see enum ia64_script_insn_opcode */ member
/external/libunwind/src/ia64/
DGscript.c267 enum ia64_script_insn_opcode opc; in compile_reg() local
521 unsigned long opc, dst; in run_script() local
/external/u-boot/common/
Dbedbug.c756 struct opcode *opc; in asmppc() local
855 int parse_operand (unsigned long memaddr, struct opcode *opc, in parse_operand()
/external/pcre/dist2/src/sljit/
DsljitNativeTILEGX_64.c524 void insert_nop(tilegx_mnemonic opc, int line) in insert_nop()
566 tilegx_mnemonic opc = inst_buf[0].opcode->can_bundle in assign_pipes() local
744 static sljit_s32 push_4_buffer(struct sljit_compiler *compiler, tilegx_mnemonic opc, int op0, int o… in push_4_buffer()
764 static sljit_s32 push_3_buffer(struct sljit_compiler *compiler, tilegx_mnemonic opc, int op0, int o… in push_3_buffer()
825 static sljit_s32 push_2_buffer(struct sljit_compiler *compiler, tilegx_mnemonic opc, int op0, int o… in push_2_buffer()
870 static sljit_s32 push_0_buffer(struct sljit_compiler *compiler, tilegx_mnemonic opc, int line) in push_0_buffer()
886 static sljit_s32 push_jr_buffer(struct sljit_compiler *compiler, tilegx_mnemonic opc, int op0, int … in push_jr_buffer()
/external/f2fs-tools/tools/sg_write_buffer/include/
Dfreebsd_nvme_ioctl.h39 uint16_t opc : 8; /* opcode */ member
/external/llvm/lib/IR/
DConstantsContext.h265 CompareConstantExpr(Type *ty, Instruction::OtherOps opc, in CompareConstantExpr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/
DConstantsContext.h272 CompareConstantExpr(Type *ty, Instruction::OtherOps opc, in CompareConstantExpr()

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