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Searched defs:r0 (Results 1 – 25 of 256) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/
Dextender.s51 r0 = #1 define
61 r0 = #1 define
70 r0 = #1 define
80 r0 = #1 define
89 r0 = #1 define
99 r0 = #1 define
123 r0 = memb(##1024056) define
131 r0 = memb(GP + #56) define
138 r0 = memub(##1024056) define
146 r0 = memub(GP + #56) define
[all …]
Dlcomm.s7 r0 = add(pc, ##dst1@PCREL) define
8 r0 = add(pc, ##dst2@PCREL) define
9 r0 = add(pc, ##dst4@PCREL) define
10 r0 = add(pc, ##dst8@PCREL) define
Dnew-value-check.s18 r0 = sfadd(r1, r2) define
53 r0 = add(r1, r2) define
Dtprel_noextend.s5 r0 = #undefined@TPREL define
8 r0 = #undefined@DTPREL define
Dtest.s4 r0 = memw(r0) } define
Diconst.s6 r0 = iconst(#a) define
Dpcrel.s7 r0 = add (pc, ##foo@PCREL) define
Dgot.s7 r0 = memw (r1 + ##foo@GOT) define
Dduplex-addi-global-imm.s11 r0 = add(r0,##g) define
Dregister-alt-names.s4 r0 = lr define
/external/llvm/test/MC/Hexagon/
Dlcomm.s7 r0 = add(pc, ##dst1@PCREL) define
8 r0 = add(pc, ##dst2@PCREL) define
9 r0 = add(pc, ##dst4@PCREL) define
10 r0 = add(pc, ##dst8@PCREL) define
Dtprel_noextend.s5 r0 = #undefined@TPREL define
8 r0 = #undefined@DTPREL define
Dnew-value-check.s18 r0 = sfadd(r1, r2) define
56 r0 = add(r1, r2) define
Dendloop.s7 r0 = #1 define
14 r0 = #1 define
Dtest.s4 r0 = memw(r0) } define
Dpcrel.s7 r0 = add (pc, ##foo@PCREL) define
Dgot.s7 r0 = memw (r1 + ##foo@GOT) define
Diconst.s6 r0 = iconst(#a) define
Dregister-alt-names.s4 r0 = lr define
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/BPF/
Dinsn-unit.s8 r0 = * (u8 *)skb[0] // BPF_LD | BPF_ABS | BPF_B define
9 r0 = *(u16 *)skb[2] // BPF_LD | BPF_ABS | BPF_H define
10 r0 = * (u32*)skb[4] // BPF_LD | BPF_ABS | BPF_W define
15 r0 = * (u8 *)skb[r0] // BPF_LD | BPF_IND | BPF_B define
16 r0 = * (u16 *)skb[r1] // BPF_LD | BPF_IND | BPF_H define
17 r0 = *(u32 *)skb[r2] // BPF_LD | BPF_IND | BPF_W define
/external/swiftshader/third_party/subzero/src/
DIceRegList.h24 #define REGLIST1(ns, r0) \ argument
26 #define REGLIST2(ns, r0, r1) \ argument
28 #define REGLIST3(ns, r0, r1, r2) \ argument
30 #define REGLIST4(ns, r0, r1, r2, r3) \ argument
32 #define REGLIST7(ns, r0, r1, r2, r3, r4, r5, r6) \ argument
/external/antlr/tool/src/test/java/org/antlr/test/
DTestTreeNodeStream.java173 Tree r0 = new CommonTree(new CommonToken(101)); in testMarkRewindEntire() local
204 Tree r0 = new CommonTree(new CommonToken(101)); in testMarkRewindInMiddle() local
249 Tree r0 = new CommonTree(new CommonToken(101)); in testMarkRewindNested() local
288 Tree r0 = new CommonTree(new CommonToken(101)); in testSeekFromStart() local
311 Tree r0 = new CommonTree(new CommonToken(101)); in testReset() local
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/PacketRules/
Dsolo.s4 r0 = r0 } define
Dregisters_readonly.s5 r0 = r0 } define
/external/libaom/libaom/av1/common/x86/
Dav1_txfm_sse4.h54 const __m128i r0 = av1_round_shift_32_sse4_1(input[i], bit); in av1_round_shift_rect_array_32_sse4_1() local
61 const __m128i r0 = _mm_slli_epi32(input[i], -bit); in av1_round_shift_rect_array_32_sse4_1() local

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