1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_framebuffer.h"
27 #include "util/u_half.h"
28 #include "util/u_helpers.h"
29 #include "util/u_math.h"
30 #include "util/u_memory.h"
31 #include "util/u_pack_color.h"
32 #include "util/u_transfer.h"
33
34 #include "tgsi/tgsi_parse.h"
35
36 #include "pipe/p_config.h"
37
38 #include "r300_cb.h"
39 #include "r300_context.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42 #include "r300_screen.h"
43 #include "r300_screen_buffer.h"
44 #include "r300_state_inlines.h"
45 #include "r300_fs.h"
46 #include "r300_texture.h"
47 #include "r300_vs.h"
48
49 /* r300_state: Functions used to intialize state context by translating
50 * Gallium state objects into semi-native r300 state objects. */
51
52 #define UPDATE_STATE(cso, atom) \
53 if (cso != atom.state) { \
54 atom.state = cso; \
55 r300_mark_atom_dirty(r300, &(atom)); \
56 }
57
blend_discard_if_src_alpha_0(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)58 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
59 unsigned dstRGB, unsigned dstA)
60 {
61 /* If the blend equation is ADD or REVERSE_SUBTRACT,
62 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
63 * will not be changed.
64 * Notice that the dst factors are the src factors inverted. */
65 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
66 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
67 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
68 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
69 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
70 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
71 srcA == PIPE_BLENDFACTOR_ZERO) &&
72 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
73 dstRGB == PIPE_BLENDFACTOR_ONE) &&
74 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
75 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
76 dstA == PIPE_BLENDFACTOR_ONE);
77 }
78
blend_discard_if_src_alpha_1(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)79 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
80 unsigned dstRGB, unsigned dstA)
81 {
82 /* If the blend equation is ADD or REVERSE_SUBTRACT,
83 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
84 * will not be changed.
85 * Notice that the dst factors are the src factors inverted. */
86 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
87 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
88 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
89 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
90 srcA == PIPE_BLENDFACTOR_ZERO) &&
91 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
92 dstRGB == PIPE_BLENDFACTOR_ONE) &&
93 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
94 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
95 dstA == PIPE_BLENDFACTOR_ONE);
96 }
97
blend_discard_if_src_color_0(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)98 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
99 unsigned dstRGB, unsigned dstA)
100 {
101 /* If the blend equation is ADD or REVERSE_SUBTRACT,
102 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
103 * will not be changed.
104 * Notice that the dst factors are the src factors inverted. */
105 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
106 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
107 (srcA == PIPE_BLENDFACTOR_ZERO) &&
108 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
109 dstRGB == PIPE_BLENDFACTOR_ONE) &&
110 (dstA == PIPE_BLENDFACTOR_ONE);
111 }
112
blend_discard_if_src_color_1(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)113 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
114 unsigned dstRGB, unsigned dstA)
115 {
116 /* If the blend equation is ADD or REVERSE_SUBTRACT,
117 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
118 * will not be changed.
119 * Notice that the dst factors are the src factors inverted. */
120 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
121 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
122 (srcA == PIPE_BLENDFACTOR_ZERO) &&
123 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
124 dstRGB == PIPE_BLENDFACTOR_ONE) &&
125 (dstA == PIPE_BLENDFACTOR_ONE);
126 }
127
blend_discard_if_src_alpha_color_0(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)128 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
129 unsigned dstRGB, unsigned dstA)
130 {
131 /* If the blend equation is ADD or REVERSE_SUBTRACT,
132 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
133 * the colorbuffer will not be changed.
134 * Notice that the dst factors are the src factors inverted. */
135 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
136 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
137 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
138 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
139 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
140 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
141 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
142 srcA == PIPE_BLENDFACTOR_ZERO) &&
143 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
144 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
145 dstRGB == PIPE_BLENDFACTOR_ONE) &&
146 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
147 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
148 dstA == PIPE_BLENDFACTOR_ONE);
149 }
150
blend_discard_if_src_alpha_color_1(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)151 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
152 unsigned dstRGB, unsigned dstA)
153 {
154 /* If the blend equation is ADD or REVERSE_SUBTRACT,
155 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
156 * the colorbuffer will not be changed.
157 * Notice that the dst factors are the src factors inverted. */
158 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
159 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
160 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
161 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
162 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
163 srcA == PIPE_BLENDFACTOR_ZERO) &&
164 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
165 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
166 dstRGB == PIPE_BLENDFACTOR_ONE) &&
167 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
168 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
169 dstA == PIPE_BLENDFACTOR_ONE);
170 }
171
blend_discard_conditionally(unsigned eqRGB,unsigned eqA,unsigned dstRGB,unsigned dstA,unsigned srcRGB,unsigned srcA)172 static unsigned blend_discard_conditionally(unsigned eqRGB, unsigned eqA,
173 unsigned dstRGB, unsigned dstA,
174 unsigned srcRGB, unsigned srcA)
175 {
176 unsigned blend_control = 0;
177
178 /* Optimization: discard pixels which don't change the colorbuffer.
179 *
180 * The code below is non-trivial and some math is involved.
181 *
182 * Discarding pixels must be disabled when FP16 AA is enabled.
183 * This is a hardware bug. Also, this implementation wouldn't work
184 * with FP blending enabled and equation clamping disabled.
185 *
186 * Equations other than ADD are rarely used and therefore won't be
187 * optimized. */
188 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
189 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
190 /* ADD: X+Y
191 * REVERSE_SUBTRACT: Y-X
192 *
193 * The idea is:
194 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
195 * then CB will not be changed.
196 *
197 * Given the srcFactor and dstFactor variables, we can derive
198 * what src and dst should be equal to and discard appropriate
199 * pixels.
200 */
201 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
202 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
203 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
204 dstRGB, dstA)) {
205 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
206 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
207 dstRGB, dstA)) {
208 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
209 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
210 dstRGB, dstA)) {
211 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
212 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
213 dstRGB, dstA)) {
214 blend_control |=
215 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
216 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
217 dstRGB, dstA)) {
218 blend_control |=
219 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
220 }
221 }
222 return blend_control;
223 }
224
225 /* The hardware colormask is clunky a must be swizzled depending on the format.
226 * This was figured out by trial-and-error. */
bgra_cmask(unsigned mask)227 static unsigned bgra_cmask(unsigned mask)
228 {
229 return ((mask & PIPE_MASK_R) << 2) |
230 ((mask & PIPE_MASK_B) >> 2) |
231 (mask & (PIPE_MASK_G | PIPE_MASK_A));
232 }
233
rgba_cmask(unsigned mask)234 static unsigned rgba_cmask(unsigned mask)
235 {
236 return mask & PIPE_MASK_RGBA;
237 }
238
rrrr_cmask(unsigned mask)239 static unsigned rrrr_cmask(unsigned mask)
240 {
241 return (mask & PIPE_MASK_R) |
242 ((mask & PIPE_MASK_R) << 1) |
243 ((mask & PIPE_MASK_R) << 2) |
244 ((mask & PIPE_MASK_R) << 3);
245 }
246
aaaa_cmask(unsigned mask)247 static unsigned aaaa_cmask(unsigned mask)
248 {
249 return ((mask & PIPE_MASK_A) >> 3) |
250 ((mask & PIPE_MASK_A) >> 2) |
251 ((mask & PIPE_MASK_A) >> 1) |
252 (mask & PIPE_MASK_A);
253 }
254
grrg_cmask(unsigned mask)255 static unsigned grrg_cmask(unsigned mask)
256 {
257 return ((mask & PIPE_MASK_R) << 1) |
258 ((mask & PIPE_MASK_R) << 2) |
259 ((mask & PIPE_MASK_G) >> 1) |
260 ((mask & PIPE_MASK_G) << 2);
261 }
262
arra_cmask(unsigned mask)263 static unsigned arra_cmask(unsigned mask)
264 {
265 return ((mask & PIPE_MASK_R) << 1) |
266 ((mask & PIPE_MASK_R) << 2) |
267 ((mask & PIPE_MASK_A) >> 3) |
268 (mask & PIPE_MASK_A);
269 }
270
blend_read_enable(unsigned eqRGB,unsigned eqA,unsigned dstRGB,unsigned dstA,unsigned srcRGB,unsigned srcA,boolean src_alpha_optz)271 static unsigned blend_read_enable(unsigned eqRGB, unsigned eqA,
272 unsigned dstRGB, unsigned dstA,
273 unsigned srcRGB, unsigned srcA,
274 boolean src_alpha_optz)
275 {
276 unsigned blend_control = 0;
277
278 /* Optimization: some operations do not require the destination color.
279 *
280 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
281 * otherwise blending gives incorrect results. It seems to be
282 * a hardware bug. */
283 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
284 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
285 dstRGB != PIPE_BLENDFACTOR_ZERO ||
286 dstA != PIPE_BLENDFACTOR_ZERO ||
287 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
288 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
289 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
290 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
291 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
292 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
293 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
294 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
295 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
296 /* Enable reading from the colorbuffer. */
297 blend_control |= R300_READ_ENABLE;
298
299 if (src_alpha_optz) {
300 /* Optimization: Depending on incoming pixels, we can
301 * conditionally disable the reading in hardware... */
302 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
303 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
304 /* Disable reading if SRC_ALPHA == 0. */
305 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
306 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
307 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
308 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
309 dstA == PIPE_BLENDFACTOR_ZERO) &&
310 (srcRGB != PIPE_BLENDFACTOR_DST_COLOR &&
311 srcRGB != PIPE_BLENDFACTOR_DST_ALPHA &&
312 srcRGB != PIPE_BLENDFACTOR_INV_DST_COLOR &&
313 srcRGB != PIPE_BLENDFACTOR_INV_DST_ALPHA)) {
314 blend_control |= R500_SRC_ALPHA_0_NO_READ;
315 }
316
317 /* Disable reading if SRC_ALPHA == 1. */
318 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
319 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
320 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
321 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
322 dstA == PIPE_BLENDFACTOR_ZERO) &&
323 (srcRGB != PIPE_BLENDFACTOR_DST_COLOR &&
324 srcRGB != PIPE_BLENDFACTOR_DST_ALPHA &&
325 srcRGB != PIPE_BLENDFACTOR_INV_DST_COLOR &&
326 srcRGB != PIPE_BLENDFACTOR_INV_DST_ALPHA)) {
327 blend_control |= R500_SRC_ALPHA_1_NO_READ;
328 }
329 }
330 }
331 }
332 return blend_control;
333 }
334
335 /* Create a new blend state based on the CSO blend state.
336 *
337 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
r300_create_blend_state(struct pipe_context * pipe,const struct pipe_blend_state * state)338 static void* r300_create_blend_state(struct pipe_context* pipe,
339 const struct pipe_blend_state* state)
340 {
341 struct r300_screen* r300screen = r300_screen(pipe->screen);
342 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
343 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */
344 uint32_t blend_control_noclamp = 0; /* R300_RB3D_CBLEND: 0x4e04 */
345 uint32_t blend_control_noalpha = 0; /* R300_RB3D_CBLEND: 0x4e04 */
346 uint32_t blend_control_noalpha_noclamp = 0; /* R300_RB3D_CBLEND: 0x4e04 */
347 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */
348 uint32_t alpha_blend_control_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */
349 uint32_t alpha_blend_control_noalpha = 0; /* R300_RB3D_ABLEND: 0x4e08 */
350 uint32_t alpha_blend_control_noalpha_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */
351 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
352 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
353 int i;
354
355 const unsigned eqRGB = state->rt[0].rgb_func;
356 const unsigned srcRGB = state->rt[0].rgb_src_factor;
357 const unsigned dstRGB = state->rt[0].rgb_dst_factor;
358
359 const unsigned eqA = state->rt[0].alpha_func;
360 const unsigned srcA = state->rt[0].alpha_src_factor;
361 const unsigned dstA = state->rt[0].alpha_dst_factor;
362
363 unsigned srcRGBX = srcRGB;
364 unsigned dstRGBX = dstRGB;
365 CB_LOCALS;
366
367 blend->state = *state;
368
369 /* force DST_ALPHA to ONE where we can */
370 switch (srcRGBX) {
371 case PIPE_BLENDFACTOR_DST_ALPHA:
372 srcRGBX = PIPE_BLENDFACTOR_ONE;
373 break;
374 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
375 srcRGBX = PIPE_BLENDFACTOR_ZERO;
376 break;
377 }
378
379 switch (dstRGBX) {
380 case PIPE_BLENDFACTOR_DST_ALPHA:
381 dstRGBX = PIPE_BLENDFACTOR_ONE;
382 break;
383 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
384 dstRGBX = PIPE_BLENDFACTOR_ZERO;
385 break;
386 }
387
388 /* Get blending register values. */
389 if (state->rt[0].blend_enable) {
390 unsigned blend_eq, blend_eq_noclamp;
391
392 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
393 * this is just the crappy D3D naming */
394 blend_control = blend_control_noclamp =
395 R300_ALPHA_BLEND_ENABLE |
396 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
397 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
398
399 blend_control_noalpha = blend_control_noalpha_noclamp =
400 R300_ALPHA_BLEND_ENABLE |
401 ( r300_translate_blend_factor(srcRGBX) << R300_SRC_BLEND_SHIFT) |
402 ( r300_translate_blend_factor(dstRGBX) << R300_DST_BLEND_SHIFT);
403
404 blend_eq = r300_translate_blend_function(eqRGB, TRUE);
405 blend_eq_noclamp = r300_translate_blend_function(eqRGB, FALSE);
406
407 blend_control |= blend_eq;
408 blend_control_noalpha |= blend_eq;
409 blend_control_noclamp |= blend_eq_noclamp;
410 blend_control_noalpha_noclamp |= blend_eq_noclamp;
411
412 /* Optimization: some operations do not require the destination color. */
413 blend_control |= blend_read_enable(eqRGB, eqA, dstRGB, dstA,
414 srcRGB, srcA, r300screen->caps.is_r500);
415 blend_control_noclamp |= blend_read_enable(eqRGB, eqA, dstRGB, dstA,
416 srcRGB, srcA, FALSE);
417 blend_control_noalpha |= blend_read_enable(eqRGB, eqA, dstRGBX, dstA,
418 srcRGBX, srcA, r300screen->caps.is_r500);
419 blend_control_noalpha_noclamp |= blend_read_enable(eqRGB, eqA, dstRGBX, dstA,
420 srcRGBX, srcA, FALSE);
421
422 /* Optimization: discard pixels which don't change the colorbuffer.
423 * It cannot be used with FP16 AA. */
424 blend_control |= blend_discard_conditionally(eqRGB, eqA, dstRGB, dstA,
425 srcRGB, srcA);
426 blend_control_noalpha |= blend_discard_conditionally(eqRGB, eqA, dstRGBX, dstA,
427 srcRGBX, srcA);
428
429 /* separate alpha */
430 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
431 blend_control |= R300_SEPARATE_ALPHA_ENABLE;
432 blend_control_noclamp |= R300_SEPARATE_ALPHA_ENABLE;
433
434 alpha_blend_control = alpha_blend_control_noclamp =
435 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
436 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
437 alpha_blend_control |= r300_translate_blend_function(eqA, TRUE);
438 alpha_blend_control_noclamp |= r300_translate_blend_function(eqA, FALSE);
439 }
440 if (srcA != srcRGBX || dstA != dstRGBX || eqA != eqRGB) {
441 blend_control_noalpha |= R300_SEPARATE_ALPHA_ENABLE;
442 blend_control_noalpha_noclamp |= R300_SEPARATE_ALPHA_ENABLE;
443
444 alpha_blend_control_noalpha = alpha_blend_control_noalpha_noclamp =
445 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
446 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
447 alpha_blend_control_noalpha |= r300_translate_blend_function(eqA, TRUE);
448 alpha_blend_control_noalpha_noclamp |= r300_translate_blend_function(eqA, FALSE);
449 }
450 }
451
452 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
453 if (state->logicop_enable) {
454 rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
455 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
456 }
457
458 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
459 * state. Since it's an optional implementation detail, we can leave it
460 * out and never dither.
461 *
462 * This could be revisited if we ever get quality or conformance hints.
463 *
464 if (state->dither) {
465 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
466 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
467 }
468 */
469
470 /* Build a command buffer. */
471 {
472 unsigned (*func[COLORMASK_NUM_SWIZZLES])(unsigned) = {
473 bgra_cmask,
474 rgba_cmask,
475 rrrr_cmask,
476 aaaa_cmask,
477 grrg_cmask,
478 arra_cmask,
479 bgra_cmask,
480 rgba_cmask
481 };
482
483 for (i = 0; i < COLORMASK_NUM_SWIZZLES; i++) {
484 boolean has_alpha = i != COLORMASK_RGBX && i != COLORMASK_BGRX;
485
486 BEGIN_CB(blend->cb_clamp[i], 8);
487 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
488 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
489 OUT_CB(has_alpha ? blend_control : blend_control_noalpha);
490 OUT_CB(has_alpha ? alpha_blend_control : alpha_blend_control_noalpha);
491 OUT_CB(func[i](state->rt[0].colormask));
492 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
493 END_CB;
494 }
495 }
496
497 /* Build a command buffer (for RGBA16F). */
498 BEGIN_CB(blend->cb_noclamp, 8);
499 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
500 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
501 OUT_CB(blend_control_noclamp);
502 OUT_CB(alpha_blend_control_noclamp);
503 OUT_CB(rgba_cmask(state->rt[0].colormask));
504 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
505 END_CB;
506
507 /* Build a command buffer (for RGB16F). */
508 BEGIN_CB(blend->cb_noclamp_noalpha, 8);
509 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
510 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
511 OUT_CB(blend_control_noalpha_noclamp);
512 OUT_CB(alpha_blend_control_noalpha_noclamp);
513 OUT_CB(rgba_cmask(state->rt[0].colormask));
514 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
515 END_CB;
516
517 /* The same as above, but with no colorbuffer reads and writes. */
518 BEGIN_CB(blend->cb_no_readwrite, 8);
519 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
520 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
521 OUT_CB(0);
522 OUT_CB(0);
523 OUT_CB(0);
524 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
525 END_CB;
526
527 return (void*)blend;
528 }
529
530 /* Bind blend state. */
r300_bind_blend_state(struct pipe_context * pipe,void * state)531 static void r300_bind_blend_state(struct pipe_context* pipe,
532 void* state)
533 {
534 struct r300_context* r300 = r300_context(pipe);
535 struct r300_blend_state *blend = (struct r300_blend_state*)state;
536 boolean last_alpha_to_one = r300->alpha_to_one;
537 boolean last_alpha_to_coverage = r300->alpha_to_coverage;
538
539 UPDATE_STATE(state, r300->blend_state);
540
541 if (!blend)
542 return;
543
544 r300->alpha_to_one = blend->state.alpha_to_one;
545 r300->alpha_to_coverage = blend->state.alpha_to_coverage;
546
547 if (r300->alpha_to_one != last_alpha_to_one && r300->msaa_enable &&
548 r300->fs_status == FRAGMENT_SHADER_VALID) {
549 r300->fs_status = FRAGMENT_SHADER_MAYBE_DIRTY;
550 }
551
552 if (r300->alpha_to_coverage != last_alpha_to_coverage &&
553 r300->msaa_enable) {
554 r300_mark_atom_dirty(r300, &r300->dsa_state);
555 }
556 }
557
558 /* Free blend state. */
r300_delete_blend_state(struct pipe_context * pipe,void * state)559 static void r300_delete_blend_state(struct pipe_context* pipe,
560 void* state)
561 {
562 FREE(state);
563 }
564
565 /* Convert float to 10bit integer */
float_to_fixed10(float f)566 static unsigned float_to_fixed10(float f)
567 {
568 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
569 }
570
571 /* Set blend color.
572 * Setup both R300 and R500 registers, figure out later which one to write. */
r300_set_blend_color(struct pipe_context * pipe,const struct pipe_blend_color * color)573 static void r300_set_blend_color(struct pipe_context* pipe,
574 const struct pipe_blend_color* color)
575 {
576 struct r300_context* r300 = r300_context(pipe);
577 struct pipe_framebuffer_state *fb = r300->fb_state.state;
578 struct r300_blend_color_state *state =
579 (struct r300_blend_color_state*)r300->blend_color_state.state;
580 struct pipe_blend_color c;
581 struct pipe_surface *cb;
582 float tmp;
583 CB_LOCALS;
584
585 state->state = *color; /* Save it, so that we can reuse it in set_fb_state */
586 c = *color;
587 cb = fb->nr_cbufs ? r300_get_nonnull_cb(fb, 0) : NULL;
588
589 /* The blend color is dependent on the colorbuffer format. */
590 if (cb) {
591 switch (cb->format) {
592 case PIPE_FORMAT_R8_UNORM:
593 case PIPE_FORMAT_L8_UNORM:
594 case PIPE_FORMAT_I8_UNORM:
595 c.color[1] = c.color[0];
596 break;
597
598 case PIPE_FORMAT_A8_UNORM:
599 c.color[1] = c.color[3];
600 break;
601
602 case PIPE_FORMAT_R8G8_UNORM:
603 c.color[2] = c.color[1];
604 break;
605
606 case PIPE_FORMAT_L8A8_UNORM:
607 case PIPE_FORMAT_R8A8_UNORM:
608 c.color[2] = c.color[3];
609 break;
610
611 case PIPE_FORMAT_R8G8B8A8_UNORM:
612 case PIPE_FORMAT_R8G8B8X8_UNORM:
613 tmp = c.color[0];
614 c.color[0] = c.color[2];
615 c.color[2] = tmp;
616 break;
617
618 default:;
619 }
620 }
621
622 if (r300->screen->caps.is_r500) {
623 BEGIN_CB(state->cb, 3);
624 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
625
626 switch (cb ? cb->format : 0) {
627 case PIPE_FORMAT_R16G16B16A16_FLOAT:
628 case PIPE_FORMAT_R16G16B16X16_FLOAT:
629 OUT_CB(util_float_to_half(c.color[2]) |
630 (util_float_to_half(c.color[3]) << 16));
631 OUT_CB(util_float_to_half(c.color[0]) |
632 (util_float_to_half(c.color[1]) << 16));
633 break;
634
635 default:
636 OUT_CB(float_to_fixed10(c.color[0]) |
637 (float_to_fixed10(c.color[3]) << 16));
638 OUT_CB(float_to_fixed10(c.color[2]) |
639 (float_to_fixed10(c.color[1]) << 16));
640 }
641
642 END_CB;
643 } else {
644 union util_color uc;
645 util_pack_color(c.color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
646
647 BEGIN_CB(state->cb, 2);
648 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui[0]);
649 END_CB;
650 }
651
652 r300_mark_atom_dirty(r300, &r300->blend_color_state);
653 }
654
r300_set_clip_state(struct pipe_context * pipe,const struct pipe_clip_state * state)655 static void r300_set_clip_state(struct pipe_context* pipe,
656 const struct pipe_clip_state* state)
657 {
658 struct r300_context* r300 = r300_context(pipe);
659 struct r300_clip_state *clip =
660 (struct r300_clip_state*)r300->clip_state.state;
661 CB_LOCALS;
662
663 if (r300->screen->caps.has_tcl) {
664 BEGIN_CB(clip->cb, r300->clip_state.size);
665 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
666 (r300->screen->caps.is_r500 ?
667 R500_PVS_UCP_START : R300_PVS_UCP_START));
668 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
669 OUT_CB_TABLE(state->ucp, 6 * 4);
670 END_CB;
671
672 r300_mark_atom_dirty(r300, &r300->clip_state);
673 } else {
674 draw_set_clip_state(r300->draw, state);
675 }
676 }
677
678 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
679 *
680 * This contains the depth buffer, stencil buffer, alpha test, and such.
681 * On the Radeon, depth and stencil buffer setup are intertwined, which is
682 * the reason for some of the strange-looking assignments across registers. */
r300_create_dsa_state(struct pipe_context * pipe,const struct pipe_depth_stencil_alpha_state * state)683 static void* r300_create_dsa_state(struct pipe_context* pipe,
684 const struct pipe_depth_stencil_alpha_state* state)
685 {
686 boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500;
687 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
688 CB_LOCALS;
689 uint32_t alpha_value_fp16 = 0;
690 uint32_t z_buffer_control = 0;
691 uint32_t z_stencil_control = 0;
692 uint32_t stencil_ref_mask = 0;
693 uint32_t stencil_ref_bf = 0;
694
695 dsa->dsa = *state;
696
697 /* Depth test setup. - separate write mask depth for decomp flush */
698 if (state->depth.writemask) {
699 z_buffer_control |= R300_Z_WRITE_ENABLE;
700 }
701
702 if (state->depth.enabled) {
703 z_buffer_control |= R300_Z_ENABLE;
704
705 z_stencil_control |=
706 (r300_translate_depth_stencil_function(state->depth.func) <<
707 R300_Z_FUNC_SHIFT);
708 }
709
710 /* Stencil buffer setup. */
711 if (state->stencil[0].enabled) {
712 z_buffer_control |= R300_STENCIL_ENABLE;
713 z_stencil_control |=
714 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
715 R300_S_FRONT_FUNC_SHIFT) |
716 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
717 R300_S_FRONT_SFAIL_OP_SHIFT) |
718 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
719 R300_S_FRONT_ZPASS_OP_SHIFT) |
720 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
721 R300_S_FRONT_ZFAIL_OP_SHIFT);
722
723 stencil_ref_mask =
724 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
725 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
726
727 if (state->stencil[1].enabled) {
728 dsa->two_sided = TRUE;
729
730 z_buffer_control |= R300_STENCIL_FRONT_BACK;
731 z_stencil_control |=
732 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
733 R300_S_BACK_FUNC_SHIFT) |
734 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
735 R300_S_BACK_SFAIL_OP_SHIFT) |
736 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
737 R300_S_BACK_ZPASS_OP_SHIFT) |
738 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
739 R300_S_BACK_ZFAIL_OP_SHIFT);
740
741 stencil_ref_bf =
742 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
743 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
744
745 if (is_r500) {
746 z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
747 } else {
748 dsa->two_sided_stencil_ref =
749 (state->stencil[0].valuemask != state->stencil[1].valuemask ||
750 state->stencil[0].writemask != state->stencil[1].writemask);
751 }
752 }
753 }
754
755 /* Alpha test setup. */
756 if (state->alpha.enabled) {
757 dsa->alpha_function =
758 r300_translate_alpha_function(state->alpha.func) |
759 R300_FG_ALPHA_FUNC_ENABLE;
760
761 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
762 alpha_value_fp16 = util_float_to_half(state->alpha.ref_value);
763 }
764
765 BEGIN_CB(&dsa->cb_begin, 8);
766 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
767 OUT_CB(z_buffer_control);
768 OUT_CB(z_stencil_control);
769 OUT_CB(stencil_ref_mask);
770 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, stencil_ref_bf);
771 OUT_CB_REG(R500_FG_ALPHA_VALUE, alpha_value_fp16);
772 END_CB;
773
774 BEGIN_CB(dsa->cb_zb_no_readwrite, 8);
775 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
776 OUT_CB(0);
777 OUT_CB(0);
778 OUT_CB(0);
779 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
780 OUT_CB_REG(R500_FG_ALPHA_VALUE, alpha_value_fp16);
781 END_CB;
782
783 return (void*)dsa;
784 }
785
r300_dsa_inject_stencilref(struct r300_context * r300)786 static void r300_dsa_inject_stencilref(struct r300_context *r300)
787 {
788 struct r300_dsa_state *dsa =
789 (struct r300_dsa_state*)r300->dsa_state.state;
790
791 if (!dsa)
792 return;
793
794 dsa->stencil_ref_mask =
795 (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) |
796 r300->stencil_ref.ref_value[0];
797 dsa->stencil_ref_bf =
798 (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) |
799 r300->stencil_ref.ref_value[1];
800 }
801
802 /* Bind DSA state. */
r300_bind_dsa_state(struct pipe_context * pipe,void * state)803 static void r300_bind_dsa_state(struct pipe_context* pipe,
804 void* state)
805 {
806 struct r300_context* r300 = r300_context(pipe);
807
808 if (!state) {
809 return;
810 }
811
812 UPDATE_STATE(state, r300->dsa_state);
813
814 r300_mark_atom_dirty(r300, &r300->hyperz_state); /* Will be updated before the emission. */
815 r300_dsa_inject_stencilref(r300);
816 }
817
818 /* Free DSA state. */
r300_delete_dsa_state(struct pipe_context * pipe,void * state)819 static void r300_delete_dsa_state(struct pipe_context* pipe,
820 void* state)
821 {
822 FREE(state);
823 }
824
r300_set_stencil_ref(struct pipe_context * pipe,const struct pipe_stencil_ref * sr)825 static void r300_set_stencil_ref(struct pipe_context* pipe,
826 const struct pipe_stencil_ref* sr)
827 {
828 struct r300_context* r300 = r300_context(pipe);
829
830 r300->stencil_ref = *sr;
831
832 r300_dsa_inject_stencilref(r300);
833 r300_mark_atom_dirty(r300, &r300->dsa_state);
834 }
835
r300_print_fb_surf_info(struct pipe_surface * surf,unsigned index,const char * binding)836 static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index,
837 const char *binding)
838 {
839 struct pipe_resource *tex = surf->texture;
840 struct r300_resource *rtex = r300_resource(tex);
841
842 fprintf(stderr,
843 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, "
844 "Lastlayer: %i, Level: %i, Format: %s\n"
845
846 "r300: TEX: Macro: %s, Micro: %s, "
847 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
848
849 binding, index, surf->width, surf->height,
850 surf->u.tex.first_layer, surf->u.tex.last_layer, surf->u.tex.level,
851 util_format_short_name(surf->format),
852
853 rtex->tex.macrotile[0] ? "YES" : " NO",
854 rtex->tex.microtile ? "YES" : " NO",
855 tex->width0, tex->height0, tex->depth0,
856 tex->last_level, util_format_short_name(surf->format));
857 }
858
r300_mark_fb_state_dirty(struct r300_context * r300,enum r300_fb_state_change change)859 void r300_mark_fb_state_dirty(struct r300_context *r300,
860 enum r300_fb_state_change change)
861 {
862 struct pipe_framebuffer_state *state = r300->fb_state.state;
863
864 r300_mark_atom_dirty(r300, &r300->gpu_flush);
865 r300_mark_atom_dirty(r300, &r300->fb_state);
866
867 /* What is marked as dirty depends on the enum r300_fb_state_change. */
868 if (change == R300_CHANGED_FB_STATE) {
869 r300_mark_atom_dirty(r300, &r300->aa_state);
870 r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */
871 r300_set_blend_color(&r300->context, r300->blend_color_state.state);
872 }
873
874 if (change == R300_CHANGED_FB_STATE ||
875 change == R300_CHANGED_HYPERZ_FLAG) {
876 r300_mark_atom_dirty(r300, &r300->hyperz_state);
877 }
878
879 if (change == R300_CHANGED_FB_STATE ||
880 change == R300_CHANGED_MULTIWRITE) {
881 r300_mark_atom_dirty(r300, &r300->fb_state_pipelined);
882 }
883
884 /* Now compute the fb_state atom size. */
885 r300->fb_state.size = 2 + (8 * state->nr_cbufs);
886
887 if (r300->cbzb_clear)
888 r300->fb_state.size += 10;
889 else if (state->zsbuf) {
890 r300->fb_state.size += 10;
891 if (r300->hyperz_enabled)
892 r300->fb_state.size += 8;
893 }
894
895 if (r300->cmask_in_use) {
896 r300->fb_state.size += 6;
897 if (r300->screen->caps.is_r500 && r300->screen->info.drm_minor >= 29) {
898 r300->fb_state.size += 3;
899 }
900 }
901
902 /* The size of the rest of atoms stays the same. */
903 }
904
905 static void
r300_set_framebuffer_state(struct pipe_context * pipe,const struct pipe_framebuffer_state * state)906 r300_set_framebuffer_state(struct pipe_context* pipe,
907 const struct pipe_framebuffer_state* state)
908 {
909 struct r300_context* r300 = r300_context(pipe);
910 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
911 struct pipe_framebuffer_state *current_state = r300->fb_state.state;
912 unsigned max_width, max_height, i;
913 uint32_t zbuffer_bpp = 0;
914 boolean unlock_zbuffer = FALSE;
915
916 if (r300->screen->caps.is_r500) {
917 max_width = max_height = 4096;
918 } else if (r300->screen->caps.is_r400) {
919 max_width = max_height = 4021;
920 } else {
921 max_width = max_height = 2560;
922 }
923
924 if (state->width > max_width || state->height > max_height) {
925 fprintf(stderr, "r300: Implementation error: Render targets are too "
926 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
927 return;
928 }
929
930 if (current_state->zsbuf && r300->zmask_in_use && !r300->locked_zbuffer) {
931 /* There is a zmask in use, what are we gonna do? */
932 if (state->zsbuf) {
933 if (!pipe_surface_equal(current_state->zsbuf, state->zsbuf)) {
934 /* Decompress the currently bound zbuffer before we bind another one. */
935 r300_decompress_zmask(r300);
936 r300->hiz_in_use = FALSE;
937 }
938 } else {
939 /* We don't bind another zbuffer, so lock the current one. */
940 pipe_surface_reference(&r300->locked_zbuffer, current_state->zsbuf);
941 }
942 } else if (r300->locked_zbuffer) {
943 /* We have a locked zbuffer now, what are we gonna do? */
944 if (state->zsbuf) {
945 if (!pipe_surface_equal(r300->locked_zbuffer, state->zsbuf)) {
946 /* We are binding some other zbuffer, so decompress the locked one,
947 * it gets unlocked automatically. */
948 r300_decompress_zmask_locked_unsafe(r300);
949 r300->hiz_in_use = FALSE;
950 } else {
951 /* We are binding the locked zbuffer again, so unlock it. */
952 unlock_zbuffer = TRUE;
953 }
954 }
955 }
956 assert(state->zsbuf || (r300->locked_zbuffer && !unlock_zbuffer) || !r300->zmask_in_use);
957
958 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
959 if (!!current_state->zsbuf != !!state->zsbuf) {
960 r300_mark_atom_dirty(r300, &r300->dsa_state);
961 }
962
963 util_copy_framebuffer_state(r300->fb_state.state, state);
964
965 /* Remove trailing NULL colorbuffers. */
966 while (current_state->nr_cbufs && !current_state->cbufs[current_state->nr_cbufs-1])
967 current_state->nr_cbufs--;
968
969 /* Set whether CMASK can be used. */
970 r300->cmask_in_use =
971 state->nr_cbufs == 1 && state->cbufs[0] &&
972 r300->screen->cmask_resource == state->cbufs[0]->texture;
973
974 /* Need to reset clamping or colormask. */
975 r300_mark_atom_dirty(r300, &r300->blend_state);
976
977 /* Re-swizzle the blend color. */
978 r300_set_blend_color(pipe, &((struct r300_blend_color_state*)r300->blend_color_state.state)->state);
979
980 if (unlock_zbuffer) {
981 pipe_surface_reference(&r300->locked_zbuffer, NULL);
982 }
983
984 r300_mark_fb_state_dirty(r300, R300_CHANGED_FB_STATE);
985
986 if (state->zsbuf) {
987 switch (util_format_get_blocksize(state->zsbuf->format)) {
988 case 2:
989 zbuffer_bpp = 16;
990 break;
991 case 4:
992 zbuffer_bpp = 24;
993 break;
994 }
995
996 /* Polygon offset depends on the zbuffer bit depth. */
997 if (r300->zbuffer_bpp != zbuffer_bpp) {
998 r300->zbuffer_bpp = zbuffer_bpp;
999
1000 if (r300->polygon_offset_enabled)
1001 r300_mark_atom_dirty(r300, &r300->rs_state);
1002 }
1003 }
1004
1005 r300->num_samples = util_framebuffer_get_num_samples(state);
1006
1007 /* Set up AA config. */
1008 if (r300->num_samples > 1) {
1009 switch (r300->num_samples) {
1010 case 2:
1011 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE |
1012 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2;
1013 break;
1014 case 4:
1015 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE |
1016 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4;
1017 break;
1018 case 6:
1019 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE |
1020 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6;
1021 break;
1022 }
1023 } else {
1024 aa->aa_config = 0;
1025 }
1026
1027 if (DBG_ON(r300, DBG_FB)) {
1028 fprintf(stderr, "r300: set_framebuffer_state:\n");
1029 for (i = 0; i < state->nr_cbufs; i++) {
1030 if (state->cbufs[i])
1031 r300_print_fb_surf_info(state->cbufs[i], i, "CB");
1032 }
1033 if (state->zsbuf) {
1034 r300_print_fb_surf_info(state->zsbuf, 0, "ZB");
1035 }
1036 }
1037 }
1038
1039 /* Create fragment shader state. */
r300_create_fs_state(struct pipe_context * pipe,const struct pipe_shader_state * shader)1040 static void* r300_create_fs_state(struct pipe_context* pipe,
1041 const struct pipe_shader_state* shader)
1042 {
1043 struct r300_fragment_shader* fs = NULL;
1044
1045 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
1046
1047 /* Copy state directly into shader. */
1048 fs->state = *shader;
1049 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
1050
1051 return (void*)fs;
1052 }
1053
r300_mark_fs_code_dirty(struct r300_context * r300)1054 void r300_mark_fs_code_dirty(struct r300_context *r300)
1055 {
1056 struct r300_fragment_shader* fs = r300_fs(r300);
1057
1058 r300_mark_atom_dirty(r300, &r300->fs);
1059 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1060 r300_mark_atom_dirty(r300, &r300->fs_constants);
1061 r300->fs.size = fs->shader->cb_code_size;
1062
1063 if (r300->screen->caps.is_r500) {
1064 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
1065 r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
1066 } else {
1067 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
1068 r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
1069 }
1070
1071 ((struct r300_constant_buffer*)r300->fs_constants.state)->remap_table =
1072 fs->shader->code.constants_remap_table;
1073 }
1074
1075 /* Bind fragment shader state. */
r300_bind_fs_state(struct pipe_context * pipe,void * shader)1076 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
1077 {
1078 struct r300_context* r300 = r300_context(pipe);
1079 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
1080
1081 if (!fs) {
1082 r300->fs.state = NULL;
1083 return;
1084 }
1085
1086 r300->fs.state = fs;
1087 r300->fs_status = FRAGMENT_SHADER_DIRTY;
1088
1089 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
1090 }
1091
1092 /* Delete fragment shader state. */
r300_delete_fs_state(struct pipe_context * pipe,void * shader)1093 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
1094 {
1095 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
1096 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
1097
1098 while (ptr) {
1099 tmp = ptr;
1100 ptr = ptr->next;
1101 rc_constants_destroy(&tmp->code.constants);
1102 FREE(tmp->cb_code);
1103 FREE(tmp);
1104 }
1105 FREE((void*)fs->state.tokens);
1106 FREE(shader);
1107 }
1108
r300_set_polygon_stipple(struct pipe_context * pipe,const struct pipe_poly_stipple * state)1109 static void r300_set_polygon_stipple(struct pipe_context* pipe,
1110 const struct pipe_poly_stipple* state)
1111 {
1112 }
1113
1114 /* Create a new rasterizer state based on the CSO rasterizer state.
1115 *
1116 * This is a very large chunk of state, and covers most of the graphics
1117 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1118 *
1119 * In a not entirely unironic sidenote, this state has nearly nothing to do
1120 * with the actual block on the Radeon called the rasterizer (RS). */
r300_create_rs_state(struct pipe_context * pipe,const struct pipe_rasterizer_state * state)1121 static void* r300_create_rs_state(struct pipe_context* pipe,
1122 const struct pipe_rasterizer_state* state)
1123 {
1124 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
1125 uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */
1126 uint32_t vap_clip_cntl; /* R300_VAP_CLIP_CNTL: 0x221C */
1127 uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */
1128 uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */
1129 uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */
1130 uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1131 uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */
1132 uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1133 uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1134 uint32_t polygon_mode; /* R300_GA_POLY_MODE: 0x4288 */
1135 uint32_t clip_rule; /* R300_SC_CLIP_RULE: 0x43D0 */
1136 uint32_t round_mode; /* R300_GA_ROUND_MODE: 0x428c */
1137
1138 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1139 float point_texcoord_left = 0; /* R300_GA_POINT_S0: 0x4200 */
1140 float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */
1141 float point_texcoord_right = 1; /* R300_GA_POINT_S1: 0x4208 */
1142 float point_texcoord_top = 0; /* R300_GA_POINT_T1: 0x420c */
1143 boolean vclamp = !r300_context(pipe)->screen->caps.is_r500;
1144 CB_LOCALS;
1145
1146 /* Copy rasterizer state. */
1147 rs->rs = *state;
1148 rs->rs_draw = *state;
1149
1150 rs->rs.sprite_coord_enable = state->point_quad_rasterization *
1151 state->sprite_coord_enable;
1152
1153 /* Override some states for Draw. */
1154 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */
1155 rs->rs_draw.offset_point = 0;
1156 rs->rs_draw.offset_line = 0;
1157 rs->rs_draw.offset_tri = 0;
1158 rs->rs_draw.offset_clamp = 0;
1159
1160 #ifdef PIPE_ARCH_LITTLE_ENDIAN
1161 vap_control_status = R300_VC_NO_SWAP;
1162 #else
1163 vap_control_status = R300_VC_32BIT_SWAP;
1164 #endif
1165
1166 /* If no TCL engine is present, turn off the HW TCL. */
1167 if (!r300_screen(pipe->screen)->caps.has_tcl) {
1168 vap_control_status |= R300_VAP_TCL_BYPASS;
1169 }
1170
1171 /* Point size width and height. */
1172 point_size =
1173 pack_float_16_6x(state->point_size) |
1174 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
1175
1176 /* Point size clamping. */
1177 if (state->point_size_per_vertex) {
1178 /* Per-vertex point size.
1179 * Clamp to [0, max FB size] */
1180 float min_psiz = util_get_min_point_size(state);
1181 float max_psiz = pipe->screen->get_paramf(pipe->screen,
1182 PIPE_CAPF_MAX_POINT_WIDTH);
1183 point_minmax =
1184 (pack_float_16_6x(min_psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
1185 (pack_float_16_6x(max_psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
1186 } else {
1187 /* We cannot disable the point-size vertex output,
1188 * so clamp it. */
1189 float psiz = state->point_size;
1190 point_minmax =
1191 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
1192 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
1193 }
1194
1195 /* Line control. */
1196 line_control = pack_float_16_6x(state->line_width) |
1197 R300_GA_LINE_CNTL_END_TYPE_COMP;
1198
1199 /* Enable polygon mode */
1200 polygon_mode = 0;
1201 if (state->fill_front != PIPE_POLYGON_MODE_FILL ||
1202 state->fill_back != PIPE_POLYGON_MODE_FILL) {
1203 polygon_mode = R300_GA_POLY_MODE_DUAL;
1204 }
1205
1206 /* Front face */
1207 if (state->front_ccw)
1208 cull_mode = R300_FRONT_FACE_CCW;
1209 else
1210 cull_mode = R300_FRONT_FACE_CW;
1211
1212 /* Polygon offset */
1213 polygon_offset_enable = 0;
1214 if (util_get_offset(state, state->fill_front)) {
1215 polygon_offset_enable |= R300_FRONT_ENABLE;
1216 }
1217 if (util_get_offset(state, state->fill_back)) {
1218 polygon_offset_enable |= R300_BACK_ENABLE;
1219 }
1220
1221 rs->polygon_offset_enable = polygon_offset_enable != 0;
1222
1223 /* Polygon mode */
1224 if (polygon_mode) {
1225 polygon_mode |=
1226 r300_translate_polygon_mode_front(state->fill_front);
1227 polygon_mode |=
1228 r300_translate_polygon_mode_back(state->fill_back);
1229 }
1230
1231 if (state->cull_face & PIPE_FACE_FRONT) {
1232 cull_mode |= R300_CULL_FRONT;
1233 }
1234 if (state->cull_face & PIPE_FACE_BACK) {
1235 cull_mode |= R300_CULL_BACK;
1236 }
1237
1238 if (state->line_stipple_enable) {
1239 line_stipple_config =
1240 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
1241 (fui((float)state->line_stipple_factor) &
1242 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
1243 /* XXX this might need to be scaled up */
1244 line_stipple_value = state->line_stipple_pattern;
1245 } else {
1246 line_stipple_config = 0;
1247 line_stipple_value = 0;
1248 }
1249
1250 if (state->flatshade) {
1251 rs->color_control = R300_SHADE_MODEL_FLAT;
1252 } else {
1253 rs->color_control = R300_SHADE_MODEL_SMOOTH;
1254 }
1255
1256 clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
1257
1258 /* Point sprites coord mode */
1259 if (rs->rs.sprite_coord_enable) {
1260 switch (state->sprite_coord_mode) {
1261 case PIPE_SPRITE_COORD_UPPER_LEFT:
1262 point_texcoord_top = 0.0f;
1263 point_texcoord_bottom = 1.0f;
1264 break;
1265 case PIPE_SPRITE_COORD_LOWER_LEFT:
1266 point_texcoord_top = 1.0f;
1267 point_texcoord_bottom = 0.0f;
1268 break;
1269 }
1270 }
1271
1272 if (r300_screen(pipe->screen)->caps.has_tcl) {
1273 vap_clip_cntl = (state->clip_plane_enable & 63) |
1274 R300_PS_UCP_MODE_CLIP_AS_TRIFAN;
1275 } else {
1276 vap_clip_cntl = R300_CLIP_DISABLE;
1277 }
1278
1279 /* Vertex color clamping. FP20 means no clamping. */
1280 round_mode =
1281 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST |
1282 (!vclamp ? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20 |
1283 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20) : 0);
1284
1285 /* Build the main command buffer. */
1286 BEGIN_CB(rs->cb_main, RS_STATE_MAIN_SIZE);
1287 OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status);
1288 OUT_CB_REG(R300_VAP_CLIP_CNTL, vap_clip_cntl);
1289 OUT_CB_REG(R300_GA_POINT_SIZE, point_size);
1290 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX, 2);
1291 OUT_CB(point_minmax);
1292 OUT_CB(line_control);
1293 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2);
1294 OUT_CB(polygon_offset_enable);
1295 rs->cull_mode_index = 11;
1296 OUT_CB(cull_mode);
1297 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config);
1298 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value);
1299 OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode);
1300 OUT_CB_REG(R300_GA_ROUND_MODE, round_mode);
1301 OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule);
1302 OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4);
1303 OUT_CB_32F(point_texcoord_left);
1304 OUT_CB_32F(point_texcoord_bottom);
1305 OUT_CB_32F(point_texcoord_right);
1306 OUT_CB_32F(point_texcoord_top);
1307 END_CB;
1308
1309 /* Build the two command buffers for polygon offset setup. */
1310 if (polygon_offset_enable) {
1311 float scale = state->offset_scale * 12;
1312 float offset = state->offset_units * 4;
1313
1314 BEGIN_CB(rs->cb_poly_offset_zb16, 5);
1315 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1316 OUT_CB_32F(scale);
1317 OUT_CB_32F(offset);
1318 OUT_CB_32F(scale);
1319 OUT_CB_32F(offset);
1320 END_CB;
1321
1322 offset = state->offset_units * 2;
1323
1324 BEGIN_CB(rs->cb_poly_offset_zb24, 5);
1325 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1326 OUT_CB_32F(scale);
1327 OUT_CB_32F(offset);
1328 OUT_CB_32F(scale);
1329 OUT_CB_32F(offset);
1330 END_CB;
1331 }
1332
1333 return (void*)rs;
1334 }
1335
1336 /* Bind rasterizer state. */
r300_bind_rs_state(struct pipe_context * pipe,void * state)1337 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
1338 {
1339 struct r300_context* r300 = r300_context(pipe);
1340 struct r300_rs_state* rs = (struct r300_rs_state*)state;
1341 int last_sprite_coord_enable = r300->sprite_coord_enable;
1342 boolean last_two_sided_color = r300->two_sided_color;
1343 boolean last_msaa_enable = r300->msaa_enable;
1344 boolean last_flatshade = r300->flatshade;
1345 boolean last_clip_halfz = r300->clip_halfz;
1346
1347 if (r300->draw && rs) {
1348 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state);
1349 }
1350
1351 if (rs) {
1352 r300->polygon_offset_enabled = rs->polygon_offset_enable;
1353 r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
1354 r300->two_sided_color = rs->rs.light_twoside;
1355 r300->msaa_enable = rs->rs.multisample;
1356 r300->flatshade = rs->rs.flatshade;
1357 r300->clip_halfz = rs->rs.clip_halfz;
1358 } else {
1359 r300->polygon_offset_enabled = FALSE;
1360 r300->sprite_coord_enable = 0;
1361 r300->two_sided_color = FALSE;
1362 r300->msaa_enable = FALSE;
1363 r300->flatshade = FALSE;
1364 r300->clip_halfz = FALSE;
1365 }
1366
1367 UPDATE_STATE(state, r300->rs_state);
1368 r300->rs_state.size = RS_STATE_MAIN_SIZE + (r300->polygon_offset_enabled ? 5 : 0);
1369
1370 if (last_sprite_coord_enable != r300->sprite_coord_enable ||
1371 last_two_sided_color != r300->two_sided_color ||
1372 last_flatshade != r300->flatshade) {
1373 r300_mark_atom_dirty(r300, &r300->rs_block_state);
1374 }
1375
1376 if (last_msaa_enable != r300->msaa_enable) {
1377 if (r300->alpha_to_coverage) {
1378 r300_mark_atom_dirty(r300, &r300->dsa_state);
1379 }
1380
1381 if (r300->alpha_to_one &&
1382 r300->fs_status == FRAGMENT_SHADER_VALID) {
1383 r300->fs_status = FRAGMENT_SHADER_MAYBE_DIRTY;
1384 }
1385 }
1386
1387 if (r300->screen->caps.has_tcl && last_clip_halfz != r300->clip_halfz) {
1388 r300_mark_atom_dirty(r300, &r300->vs_state);
1389 }
1390 }
1391
1392 /* Free rasterizer state. */
r300_delete_rs_state(struct pipe_context * pipe,void * state)1393 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
1394 {
1395 FREE(state);
1396 }
1397
1398 static void*
r300_create_sampler_state(struct pipe_context * pipe,const struct pipe_sampler_state * state)1399 r300_create_sampler_state(struct pipe_context* pipe,
1400 const struct pipe_sampler_state* state)
1401 {
1402 struct r300_context* r300 = r300_context(pipe);
1403 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
1404 boolean is_r500 = r300->screen->caps.is_r500;
1405 int lod_bias;
1406
1407 sampler->state = *state;
1408
1409 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1410 * or MIN filter is NEAREST. Since texwrap produces same results
1411 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1412 if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST ||
1413 sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) {
1414 /* Wrap S. */
1415 if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP)
1416 sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1417 else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP)
1418 sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1419
1420 /* Wrap T. */
1421 if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP)
1422 sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1423 else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP)
1424 sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1425
1426 /* Wrap R. */
1427 if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP)
1428 sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1429 else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP)
1430 sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1431 }
1432
1433 sampler->filter0 |=
1434 (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) |
1435 (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) |
1436 (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT);
1437
1438 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
1439 state->mag_img_filter,
1440 state->min_mip_filter,
1441 state->max_anisotropy > 1);
1442
1443 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
1444
1445 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1446 /* We must pass these to the merge function to clamp them properly. */
1447 sampler->min_lod = (unsigned)MAX2(state->min_lod, 0);
1448 sampler->max_lod = (unsigned)MAX2(ceilf(state->max_lod), 0);
1449
1450 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1);
1451
1452 sampler->filter1 |= (lod_bias << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1453
1454 /* This is very high quality anisotropic filtering for R5xx.
1455 * It's good for benchmarking the performance of texturing but
1456 * in practice we don't want to slow down the driver because it's
1457 * a pretty good performance killer. Feel free to play with it. */
1458 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
1459 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
1460 }
1461
1462 /* R500-specific fixups and optimizations */
1463 if (r300->screen->caps.is_r500) {
1464 sampler->filter1 |= R500_BORDER_FIX;
1465 }
1466
1467 return (void*)sampler;
1468 }
1469
r300_bind_sampler_states(struct pipe_context * pipe,enum pipe_shader_type shader,unsigned start,unsigned count,void ** states)1470 static void r300_bind_sampler_states(struct pipe_context* pipe,
1471 enum pipe_shader_type shader,
1472 unsigned start, unsigned count,
1473 void** states)
1474 {
1475 struct r300_context* r300 = r300_context(pipe);
1476 struct r300_textures_state* state =
1477 (struct r300_textures_state*)r300->textures_state.state;
1478 unsigned tex_units = r300->screen->caps.num_tex_units;
1479
1480 assert(start == 0);
1481
1482 if (shader != PIPE_SHADER_FRAGMENT)
1483 return;
1484
1485 if (count > tex_units)
1486 return;
1487
1488 memcpy(state->sampler_states, states, sizeof(void*) * count);
1489 state->sampler_state_count = count;
1490
1491 r300_mark_atom_dirty(r300, &r300->textures_state);
1492 }
1493
r300_delete_sampler_state(struct pipe_context * pipe,void * state)1494 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
1495 {
1496 FREE(state);
1497 }
1498
r300_assign_texture_cache_region(unsigned index,unsigned num)1499 static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num)
1500 {
1501 /* This looks like a hack, but I believe it's suppose to work like
1502 * that. To illustrate how this works, let's assume you have 5 textures.
1503 * From docs, 5 and the successive numbers are:
1504 *
1505 * FOURTH_1 = 5
1506 * FOURTH_2 = 6
1507 * FOURTH_3 = 7
1508 * EIGHTH_0 = 8
1509 * EIGHTH_1 = 9
1510 *
1511 * First 3 textures will get 3/4 of size of the cache, divived evenly
1512 * between them. The last 1/4 of the cache must be divided between
1513 * the last 2 textures, each will therefore get 1/8 of the cache.
1514 * Why not just to use "5 + texture_index" ?
1515 *
1516 * This simple trick works for all "num" <= 16.
1517 */
1518 if (num <= 1)
1519 return R300_TX_CACHE(R300_TX_CACHE_WHOLE);
1520 else
1521 return R300_TX_CACHE(num + index);
1522 }
1523
r300_set_sampler_views(struct pipe_context * pipe,enum pipe_shader_type shader,unsigned start,unsigned count,struct pipe_sampler_view ** views)1524 static void r300_set_sampler_views(struct pipe_context* pipe,
1525 enum pipe_shader_type shader,
1526 unsigned start, unsigned count,
1527 struct pipe_sampler_view** views)
1528 {
1529 struct r300_context* r300 = r300_context(pipe);
1530 struct r300_textures_state* state =
1531 (struct r300_textures_state*)r300->textures_state.state;
1532 struct r300_resource *texture;
1533 unsigned i, real_num_views = 0, view_index = 0;
1534 unsigned tex_units = r300->screen->caps.num_tex_units;
1535 boolean dirty_tex = FALSE;
1536
1537 if (shader != PIPE_SHADER_FRAGMENT)
1538 return;
1539
1540 assert(start == 0); /* non-zero not handled yet */
1541
1542 if (count > tex_units) {
1543 return;
1544 }
1545
1546 /* Calculate the real number of views. */
1547 for (i = 0; i < count; i++) {
1548 if (views[i])
1549 real_num_views++;
1550 }
1551
1552 for (i = 0; i < count; i++) {
1553 pipe_sampler_view_reference(
1554 (struct pipe_sampler_view**)&state->sampler_views[i],
1555 views[i]);
1556
1557 if (!views[i]) {
1558 continue;
1559 }
1560
1561 /* A new sampler view (= texture)... */
1562 dirty_tex = TRUE;
1563
1564 /* Set the texrect factor in the fragment shader.
1565 * Needed for RECT and NPOT fallback. */
1566 texture = r300_resource(views[i]->texture);
1567 if (texture->tex.is_npot) {
1568 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1569 }
1570
1571 state->sampler_views[i]->texcache_region =
1572 r300_assign_texture_cache_region(view_index, real_num_views);
1573 view_index++;
1574 }
1575
1576 for (i = count; i < tex_units; i++) {
1577 if (state->sampler_views[i]) {
1578 pipe_sampler_view_reference(
1579 (struct pipe_sampler_view**)&state->sampler_views[i],
1580 NULL);
1581 }
1582 }
1583
1584 state->sampler_view_count = count;
1585
1586 r300_mark_atom_dirty(r300, &r300->textures_state);
1587
1588 if (dirty_tex) {
1589 r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
1590 }
1591 }
1592
1593 struct pipe_sampler_view *
r300_create_sampler_view_custom(struct pipe_context * pipe,struct pipe_resource * texture,const struct pipe_sampler_view * templ,unsigned width0_override,unsigned height0_override)1594 r300_create_sampler_view_custom(struct pipe_context *pipe,
1595 struct pipe_resource *texture,
1596 const struct pipe_sampler_view *templ,
1597 unsigned width0_override,
1598 unsigned height0_override)
1599 {
1600 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
1601 struct r300_resource *tex = r300_resource(texture);
1602 boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500;
1603 boolean dxtc_swizzle = r300_screen(pipe->screen)->caps.dxtc_swizzle;
1604
1605 if (view) {
1606 unsigned hwformat;
1607
1608 view->base = *templ;
1609 view->base.reference.count = 1;
1610 view->base.context = pipe;
1611 view->base.texture = NULL;
1612 pipe_resource_reference(&view->base.texture, texture);
1613
1614 view->width0_override = width0_override;
1615 view->height0_override = height0_override;
1616 view->swizzle[0] = templ->swizzle_r;
1617 view->swizzle[1] = templ->swizzle_g;
1618 view->swizzle[2] = templ->swizzle_b;
1619 view->swizzle[3] = templ->swizzle_a;
1620
1621 hwformat = r300_translate_texformat(templ->format,
1622 view->swizzle,
1623 is_r500,
1624 dxtc_swizzle);
1625
1626 if (hwformat == ~0) {
1627 fprintf(stderr, "r300: Ooops. Got unsupported format %s in %s.\n",
1628 util_format_short_name(templ->format), __func__);
1629 }
1630 assert(hwformat != ~0);
1631
1632 r300_texture_setup_format_state(r300_screen(pipe->screen), tex,
1633 templ->format, 0,
1634 width0_override, height0_override,
1635 &view->format);
1636 view->format.format1 |= hwformat;
1637 if (is_r500) {
1638 view->format.format2 |= r500_tx_format_msb_bit(templ->format);
1639 }
1640 }
1641
1642 return (struct pipe_sampler_view*)view;
1643 }
1644
1645 static struct pipe_sampler_view *
r300_create_sampler_view(struct pipe_context * pipe,struct pipe_resource * texture,const struct pipe_sampler_view * templ)1646 r300_create_sampler_view(struct pipe_context *pipe,
1647 struct pipe_resource *texture,
1648 const struct pipe_sampler_view *templ)
1649 {
1650 return r300_create_sampler_view_custom(pipe, texture, templ,
1651 r300_resource(texture)->tex.width0,
1652 r300_resource(texture)->tex.height0);
1653 }
1654
1655
1656 static void
r300_sampler_view_destroy(struct pipe_context * pipe,struct pipe_sampler_view * view)1657 r300_sampler_view_destroy(struct pipe_context *pipe,
1658 struct pipe_sampler_view *view)
1659 {
1660 pipe_resource_reference(&view->texture, NULL);
1661 FREE(view);
1662 }
1663
r300_set_sample_mask(struct pipe_context * pipe,unsigned mask)1664 static void r300_set_sample_mask(struct pipe_context *pipe,
1665 unsigned mask)
1666 {
1667 struct r300_context* r300 = r300_context(pipe);
1668
1669 *((unsigned*)r300->sample_mask.state) = mask;
1670
1671 r300_mark_atom_dirty(r300, &r300->sample_mask);
1672 }
1673
r300_set_scissor_states(struct pipe_context * pipe,unsigned start_slot,unsigned num_scissors,const struct pipe_scissor_state * state)1674 static void r300_set_scissor_states(struct pipe_context* pipe,
1675 unsigned start_slot,
1676 unsigned num_scissors,
1677 const struct pipe_scissor_state* state)
1678 {
1679 struct r300_context* r300 = r300_context(pipe);
1680
1681 memcpy(r300->scissor_state.state, state,
1682 sizeof(struct pipe_scissor_state));
1683
1684 r300_mark_atom_dirty(r300, &r300->scissor_state);
1685 }
1686
r300_set_viewport_states(struct pipe_context * pipe,unsigned start_slot,unsigned num_viewports,const struct pipe_viewport_state * state)1687 static void r300_set_viewport_states(struct pipe_context* pipe,
1688 unsigned start_slot,
1689 unsigned num_viewports,
1690 const struct pipe_viewport_state* state)
1691 {
1692 struct r300_context* r300 = r300_context(pipe);
1693 struct r300_viewport_state* viewport =
1694 (struct r300_viewport_state*)r300->viewport_state.state;
1695
1696 r300->viewport = *state;
1697
1698 if (r300->draw) {
1699 draw_set_viewport_states(r300->draw, start_slot, num_viewports, state);
1700 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT;
1701 return;
1702 }
1703
1704 /* Do the transform in HW. */
1705 viewport->vte_control = R300_VTX_W0_FMT;
1706
1707 if (state->scale[0] != 1.0f) {
1708 viewport->xscale = state->scale[0];
1709 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1710 }
1711 if (state->scale[1] != 1.0f) {
1712 viewport->yscale = state->scale[1];
1713 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1714 }
1715 if (state->scale[2] != 1.0f) {
1716 viewport->zscale = state->scale[2];
1717 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1718 }
1719 if (state->translate[0] != 0.0f) {
1720 viewport->xoffset = state->translate[0];
1721 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1722 }
1723 if (state->translate[1] != 0.0f) {
1724 viewport->yoffset = state->translate[1];
1725 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1726 }
1727 if (state->translate[2] != 0.0f) {
1728 viewport->zoffset = state->translate[2];
1729 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1730 }
1731
1732 r300_mark_atom_dirty(r300, &r300->viewport_state);
1733 if (r300->fs.state && r300_fs(r300)->shader &&
1734 r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) {
1735 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1736 }
1737 }
1738
r300_set_vertex_buffers_hwtcl(struct pipe_context * pipe,unsigned start_slot,unsigned count,const struct pipe_vertex_buffer * buffers)1739 static void r300_set_vertex_buffers_hwtcl(struct pipe_context* pipe,
1740 unsigned start_slot, unsigned count,
1741 const struct pipe_vertex_buffer* buffers)
1742 {
1743 struct r300_context* r300 = r300_context(pipe);
1744
1745 util_set_vertex_buffers_count(r300->vertex_buffer,
1746 &r300->nr_vertex_buffers,
1747 buffers, start_slot, count);
1748
1749 /* There must be at least one vertex buffer set, otherwise it locks up. */
1750 if (!r300->nr_vertex_buffers) {
1751 util_set_vertex_buffers_count(r300->vertex_buffer,
1752 &r300->nr_vertex_buffers,
1753 &r300->dummy_vb, 0, 1);
1754 }
1755
1756 r300->vertex_arrays_dirty = TRUE;
1757 }
1758
r300_set_vertex_buffers_swtcl(struct pipe_context * pipe,unsigned start_slot,unsigned count,const struct pipe_vertex_buffer * buffers)1759 static void r300_set_vertex_buffers_swtcl(struct pipe_context* pipe,
1760 unsigned start_slot, unsigned count,
1761 const struct pipe_vertex_buffer* buffers)
1762 {
1763 struct r300_context* r300 = r300_context(pipe);
1764 unsigned i;
1765
1766 util_set_vertex_buffers_count(r300->vertex_buffer,
1767 &r300->nr_vertex_buffers,
1768 buffers, start_slot, count);
1769 draw_set_vertex_buffers(r300->draw, start_slot, count, buffers);
1770
1771 if (!buffers)
1772 return;
1773
1774 for (i = 0; i < count; i++) {
1775 if (buffers[i].is_user_buffer) {
1776 draw_set_mapped_vertex_buffer(r300->draw, start_slot + i,
1777 buffers[i].buffer.user, ~0);
1778 } else if (buffers[i].buffer.resource) {
1779 draw_set_mapped_vertex_buffer(r300->draw, start_slot + i,
1780 r300_resource(buffers[i].buffer.resource)->malloced_buffer, ~0);
1781 }
1782 }
1783 }
1784
1785 /* Initialize the PSC tables. */
r300_vertex_psc(struct r300_vertex_element_state * velems)1786 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1787 {
1788 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1789 uint16_t type, swizzle;
1790 enum pipe_format format;
1791 unsigned i;
1792
1793 /* Vertex shaders have no semantics on their inputs,
1794 * so PSC should just route stuff based on the vertex elements,
1795 * and not on attrib information. */
1796 for (i = 0; i < velems->count; i++) {
1797 format = velems->velem[i].src_format;
1798
1799 type = r300_translate_vertex_data_type(format);
1800 if (type == R300_INVALID_FORMAT) {
1801 fprintf(stderr, "r300: Bad vertex format %s.\n",
1802 util_format_short_name(format));
1803 assert(0);
1804 abort();
1805 }
1806
1807 type |= i << R300_DST_VEC_LOC_SHIFT;
1808 swizzle = r300_translate_vertex_data_swizzle(format);
1809
1810 if (i & 1) {
1811 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1812 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1813 } else {
1814 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1815 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1816 }
1817 }
1818
1819 /* Set the last vector in the PSC. */
1820 if (i) {
1821 i -= 1;
1822 }
1823 vstream->vap_prog_stream_cntl[i >> 1] |=
1824 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1825
1826 vstream->count = (i >> 1) + 1;
1827 }
1828
r300_create_vertex_elements_state(struct pipe_context * pipe,unsigned count,const struct pipe_vertex_element * attribs)1829 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1830 unsigned count,
1831 const struct pipe_vertex_element* attribs)
1832 {
1833 struct r300_vertex_element_state *velems;
1834 unsigned i;
1835 struct pipe_vertex_element dummy_attrib = {0};
1836
1837 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1838 if (!count) {
1839 dummy_attrib.src_format = PIPE_FORMAT_R8G8B8A8_UNORM;
1840 attribs = &dummy_attrib;
1841 count = 1;
1842 } else if (count > 16) {
1843 fprintf(stderr, "r300: More than 16 vertex elements are not supported,"
1844 " requested %i, using 16.\n", count);
1845 count = 16;
1846 }
1847
1848 velems = CALLOC_STRUCT(r300_vertex_element_state);
1849 if (!velems)
1850 return NULL;
1851
1852 velems->count = count;
1853 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1854
1855 if (r300_screen(pipe->screen)->caps.has_tcl) {
1856 /* Setup PSC.
1857 * The unused components will be replaced by (..., 0, 1). */
1858 r300_vertex_psc(velems);
1859
1860 for (i = 0; i < count; i++) {
1861 velems->format_size[i] =
1862 align(util_format_get_blocksize(velems->velem[i].src_format), 4);
1863 velems->vertex_size_dwords += velems->format_size[i] / 4;
1864 }
1865 }
1866
1867 return velems;
1868 }
1869
r300_bind_vertex_elements_state(struct pipe_context * pipe,void * state)1870 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1871 void *state)
1872 {
1873 struct r300_context *r300 = r300_context(pipe);
1874 struct r300_vertex_element_state *velems = state;
1875
1876 if (!velems) {
1877 return;
1878 }
1879
1880 r300->velems = velems;
1881
1882 if (r300->draw) {
1883 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1884 return;
1885 }
1886
1887 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1888 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1889 r300->vertex_arrays_dirty = TRUE;
1890 }
1891
r300_delete_vertex_elements_state(struct pipe_context * pipe,void * state)1892 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1893 {
1894 FREE(state);
1895 }
1896
r300_create_vs_state(struct pipe_context * pipe,const struct pipe_shader_state * shader)1897 static void* r300_create_vs_state(struct pipe_context* pipe,
1898 const struct pipe_shader_state* shader)
1899 {
1900 struct r300_context* r300 = r300_context(pipe);
1901 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1902
1903 /* Copy state directly into shader. */
1904 vs->state = *shader;
1905 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
1906
1907 if (r300->screen->caps.has_tcl) {
1908 r300_init_vs_outputs(r300, vs);
1909 r300_translate_vertex_shader(r300, vs);
1910 } else {
1911 r300_draw_init_vertex_shader(r300, vs);
1912 }
1913
1914 return vs;
1915 }
1916
r300_bind_vs_state(struct pipe_context * pipe,void * shader)1917 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1918 {
1919 struct r300_context* r300 = r300_context(pipe);
1920 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1921
1922 if (!vs) {
1923 r300->vs_state.state = NULL;
1924 return;
1925 }
1926 if (vs == r300->vs_state.state) {
1927 return;
1928 }
1929 r300->vs_state.state = vs;
1930
1931 /* The majority of the RS block bits is dependent on the vertex shader. */
1932 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
1933
1934 if (r300->screen->caps.has_tcl) {
1935 unsigned fc_op_dwords = r300->screen->caps.is_r500 ? 3 : 2;
1936 r300_mark_atom_dirty(r300, &r300->vs_state);
1937 r300->vs_state.size = vs->code.length + 9 +
1938 (R300_VS_MAX_FC_OPS * fc_op_dwords + 4);
1939
1940 r300_mark_atom_dirty(r300, &r300->vs_constants);
1941 r300->vs_constants.size =
1942 2 +
1943 (vs->externals_count ? vs->externals_count * 4 + 3 : 0) +
1944 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0);
1945
1946 ((struct r300_constant_buffer*)r300->vs_constants.state)->remap_table =
1947 vs->code.constants_remap_table;
1948
1949 r300_mark_atom_dirty(r300, &r300->pvs_flush);
1950 } else {
1951 draw_bind_vertex_shader(r300->draw,
1952 (struct draw_vertex_shader*)vs->draw_vs);
1953 }
1954 }
1955
r300_delete_vs_state(struct pipe_context * pipe,void * shader)1956 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1957 {
1958 struct r300_context* r300 = r300_context(pipe);
1959 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1960
1961 if (r300->screen->caps.has_tcl) {
1962 rc_constants_destroy(&vs->code.constants);
1963 FREE(vs->code.constants_remap_table);
1964 } else {
1965 draw_delete_vertex_shader(r300->draw,
1966 (struct draw_vertex_shader*)vs->draw_vs);
1967 }
1968
1969 FREE((void*)vs->state.tokens);
1970 FREE(shader);
1971 }
1972
r300_set_constant_buffer(struct pipe_context * pipe,enum pipe_shader_type shader,uint index,const struct pipe_constant_buffer * cb)1973 static void r300_set_constant_buffer(struct pipe_context *pipe,
1974 enum pipe_shader_type shader, uint index,
1975 const struct pipe_constant_buffer *cb)
1976 {
1977 struct r300_context* r300 = r300_context(pipe);
1978 struct r300_constant_buffer *cbuf;
1979 uint32_t *mapped;
1980
1981 if (!cb || (!cb->buffer && !cb->user_buffer))
1982 return;
1983
1984 switch (shader) {
1985 case PIPE_SHADER_VERTEX:
1986 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state;
1987 break;
1988 case PIPE_SHADER_FRAGMENT:
1989 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state;
1990 break;
1991 default:
1992 return;
1993 }
1994
1995
1996 if (cb->user_buffer)
1997 mapped = (uint32_t*)cb->user_buffer;
1998 else {
1999 struct r300_resource *rbuf = r300_resource(cb->buffer);
2000
2001 if (rbuf && rbuf->malloced_buffer)
2002 mapped = (uint32_t*)rbuf->malloced_buffer;
2003 else
2004 return;
2005 }
2006
2007 if (shader == PIPE_SHADER_FRAGMENT ||
2008 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
2009 cbuf->ptr = mapped;
2010 }
2011
2012 if (shader == PIPE_SHADER_VERTEX) {
2013 if (r300->screen->caps.has_tcl) {
2014 struct r300_vertex_shader *vs =
2015 (struct r300_vertex_shader*)r300->vs_state.state;
2016
2017 if (!vs) {
2018 cbuf->buffer_base = 0;
2019 return;
2020 }
2021
2022 cbuf->buffer_base = r300->vs_const_base;
2023 r300->vs_const_base += vs->code.constants.Count;
2024 if (r300->vs_const_base > R500_MAX_PVS_CONST_VECS) {
2025 r300->vs_const_base = vs->code.constants.Count;
2026 cbuf->buffer_base = 0;
2027 r300_mark_atom_dirty(r300, &r300->pvs_flush);
2028 }
2029 r300_mark_atom_dirty(r300, &r300->vs_constants);
2030 } else if (r300->draw) {
2031 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
2032 0, mapped, cb->buffer_size);
2033 }
2034 } else if (shader == PIPE_SHADER_FRAGMENT) {
2035 r300_mark_atom_dirty(r300, &r300->fs_constants);
2036 }
2037 }
2038
r300_texture_barrier(struct pipe_context * pipe,unsigned flags)2039 static void r300_texture_barrier(struct pipe_context *pipe, unsigned flags)
2040 {
2041 struct r300_context *r300 = r300_context(pipe);
2042
2043 r300_mark_atom_dirty(r300, &r300->gpu_flush);
2044 r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
2045 }
2046
r300_memory_barrier(struct pipe_context * pipe,unsigned flags)2047 static void r300_memory_barrier(struct pipe_context *pipe, unsigned flags)
2048 {
2049 }
2050
r300_init_state_functions(struct r300_context * r300)2051 void r300_init_state_functions(struct r300_context* r300)
2052 {
2053 r300->context.create_blend_state = r300_create_blend_state;
2054 r300->context.bind_blend_state = r300_bind_blend_state;
2055 r300->context.delete_blend_state = r300_delete_blend_state;
2056
2057 r300->context.set_blend_color = r300_set_blend_color;
2058
2059 r300->context.set_clip_state = r300_set_clip_state;
2060 r300->context.set_sample_mask = r300_set_sample_mask;
2061
2062 r300->context.set_constant_buffer = r300_set_constant_buffer;
2063
2064 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
2065 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
2066 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
2067
2068 r300->context.set_stencil_ref = r300_set_stencil_ref;
2069
2070 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
2071
2072 r300->context.create_fs_state = r300_create_fs_state;
2073 r300->context.bind_fs_state = r300_bind_fs_state;
2074 r300->context.delete_fs_state = r300_delete_fs_state;
2075
2076 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
2077
2078 r300->context.create_rasterizer_state = r300_create_rs_state;
2079 r300->context.bind_rasterizer_state = r300_bind_rs_state;
2080 r300->context.delete_rasterizer_state = r300_delete_rs_state;
2081
2082 r300->context.create_sampler_state = r300_create_sampler_state;
2083 r300->context.bind_sampler_states = r300_bind_sampler_states;
2084 r300->context.delete_sampler_state = r300_delete_sampler_state;
2085
2086 r300->context.set_sampler_views = r300_set_sampler_views;
2087 r300->context.create_sampler_view = r300_create_sampler_view;
2088 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
2089
2090 r300->context.set_scissor_states = r300_set_scissor_states;
2091
2092 r300->context.set_viewport_states = r300_set_viewport_states;
2093
2094 if (r300->screen->caps.has_tcl) {
2095 r300->context.set_vertex_buffers = r300_set_vertex_buffers_hwtcl;
2096 } else {
2097 r300->context.set_vertex_buffers = r300_set_vertex_buffers_swtcl;
2098 }
2099
2100 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
2101 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
2102 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
2103
2104 r300->context.create_vs_state = r300_create_vs_state;
2105 r300->context.bind_vs_state = r300_bind_vs_state;
2106 r300->context.delete_vs_state = r300_delete_vs_state;
2107
2108 r300->context.texture_barrier = r300_texture_barrier;
2109 r300->context.memory_barrier = r300_memory_barrier;
2110 }
2111