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1 /*
2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * on the rights to use, copy, modify, merge, publish, distribute, sub
9  * license, and/or sell copies of the Software, and to permit persons to whom
10  * the Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "util/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30 
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36 
37 #include "draw/draw_context.h"
38 
39 /* Return the identifier behind whom the brave coders responsible for this
40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41  *
42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
43  *
44  * (Or egotistical. Yet.) */
r300_get_vendor(struct pipe_screen * pscreen)45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47     return "X.Org R300 Project";
48 }
49 
r300_get_device_vendor(struct pipe_screen * pscreen)50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52     return "ATI";
53 }
54 
55 static const char* chip_families[] = {
56     "unknown",
57     "ATI R300",
58     "ATI R350",
59     "ATI RV350",
60     "ATI RV370",
61     "ATI RV380",
62     "ATI RS400",
63     "ATI RC410",
64     "ATI RS480",
65     "ATI R420",
66     "ATI R423",
67     "ATI R430",
68     "ATI R480",
69     "ATI R481",
70     "ATI RV410",
71     "ATI RS600",
72     "ATI RS690",
73     "ATI RS740",
74     "ATI RV515",
75     "ATI R520",
76     "ATI RV530",
77     "ATI R580",
78     "ATI RV560",
79     "ATI RV570"
80 };
81 
r300_get_name(struct pipe_screen * pscreen)82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84     struct r300_screen* r300screen = r300_screen(pscreen);
85 
86     return chip_families[r300screen->caps.family];
87 }
88 
r300_get_param(struct pipe_screen * pscreen,enum pipe_cap param)89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91     struct r300_screen* r300screen = r300_screen(pscreen);
92     boolean is_r500 = r300screen->caps.is_r500;
93 
94     switch (param) {
95         /* Supported features (boolean caps). */
96         case PIPE_CAP_NPOT_TEXTURES:
97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
99         case PIPE_CAP_ANISOTROPIC_FILTER:
100         case PIPE_CAP_POINT_SPRITE:
101         case PIPE_CAP_OCCLUSION_QUERY:
102         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
103         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
104         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
105         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
106         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
107         case PIPE_CAP_CONDITIONAL_RENDER:
108         case PIPE_CAP_TEXTURE_BARRIER:
109         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
110         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
111         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
112         case PIPE_CAP_CLIP_HALFZ:
113         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
114             return 1;
115 
116         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
117             return R300_BUFFER_ALIGNMENT;
118 
119         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
120             return 16;
121 
122         case PIPE_CAP_GLSL_FEATURE_LEVEL:
123             return 120;
124 
125         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
126         case PIPE_CAP_TEXTURE_SWIZZLE:
127             return r300screen->caps.dxtc_swizzle;
128 
129         /* We don't support color clamping on r500, so that we can use color
130          * intepolators for generic varyings. */
131         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
132             return !is_r500;
133 
134         /* Supported on r500 only. */
135         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
136         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
137         case PIPE_CAP_SM3:
138             return is_r500 ? 1 : 0;
139 
140         /* Unsupported features. */
141         case PIPE_CAP_QUERY_TIME_ELAPSED:
142         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
143         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
144         case PIPE_CAP_INDEP_BLEND_ENABLE:
145         case PIPE_CAP_INDEP_BLEND_FUNC:
146         case PIPE_CAP_DEPTH_CLIP_DISABLE:
147         case PIPE_CAP_SHADER_STENCIL_EXPORT:
148         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
149         case PIPE_CAP_TGSI_INSTANCEID:
150         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
151         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
152         case PIPE_CAP_SEAMLESS_CUBE_MAP:
153         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
154         case PIPE_CAP_MIN_TEXEL_OFFSET:
155         case PIPE_CAP_MAX_TEXEL_OFFSET:
156         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
157         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
158         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
159         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
160         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
161         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
162         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
163         case PIPE_CAP_MAX_VERTEX_STREAMS:
164         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
165         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
166         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
167         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
168         case PIPE_CAP_COMPUTE:
169         case PIPE_CAP_START_INSTANCE:
170         case PIPE_CAP_QUERY_TIMESTAMP:
171         case PIPE_CAP_TEXTURE_MULTISAMPLE:
172         case PIPE_CAP_CUBE_MAP_ARRAY:
173         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
174         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
175         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
176         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
177         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
178         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
179         case PIPE_CAP_TEXTURE_GATHER_SM5:
180         case PIPE_CAP_TEXTURE_QUERY_LOD:
181         case PIPE_CAP_FAKE_SW_MSAA:
182         case PIPE_CAP_SAMPLE_SHADING:
183         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
184         case PIPE_CAP_DRAW_INDIRECT:
185         case PIPE_CAP_MULTI_DRAW_INDIRECT:
186         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
187         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
188         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
189         case PIPE_CAP_SAMPLER_VIEW_TARGET:
190         case PIPE_CAP_VERTEXID_NOBASE:
191         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
192         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
193         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
194         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
195         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
196         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
197         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
198         case PIPE_CAP_DEPTH_BOUNDS_TEST:
199         case PIPE_CAP_TGSI_TXQS:
200         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
201         case PIPE_CAP_SHAREABLE_SHADERS:
202         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
203         case PIPE_CAP_CLEAR_TEXTURE:
204         case PIPE_CAP_DRAW_PARAMETERS:
205         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
206         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
207         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
208         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
209         case PIPE_CAP_INVALIDATE_BUFFER:
210         case PIPE_CAP_GENERATE_MIPMAP:
211         case PIPE_CAP_STRING_MARKER:
212         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
213         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
214         case PIPE_CAP_QUERY_BUFFER_OBJECT:
215         case PIPE_CAP_QUERY_MEMORY_INFO:
216         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
217         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
218         case PIPE_CAP_CULL_DISTANCE:
219         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
220         case PIPE_CAP_TGSI_VOTE:
221         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
222         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
223         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
224         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
225         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
226         case PIPE_CAP_NATIVE_FENCE_FD:
227         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
228         case PIPE_CAP_TGSI_FS_FBFETCH:
229         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
230         case PIPE_CAP_DOUBLES:
231         case PIPE_CAP_INT64:
232         case PIPE_CAP_INT64_DIVMOD:
233         case PIPE_CAP_TGSI_TEX_TXF_LZ:
234         case PIPE_CAP_TGSI_CLOCK:
235         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
236         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
237         case PIPE_CAP_TGSI_BALLOT:
238         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
239         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
240         case PIPE_CAP_POST_DEPTH_COVERAGE:
241         case PIPE_CAP_BINDLESS_TEXTURE:
242         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
243         case PIPE_CAP_QUERY_SO_OVERFLOW:
244         case PIPE_CAP_MEMOBJ:
245         case PIPE_CAP_LOAD_CONSTBUF:
246         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
247         case PIPE_CAP_TILE_RASTER_ORDER:
248         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
249         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
250         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
251             return 0;
252 
253         /* SWTCL-only features. */
254         case PIPE_CAP_PRIMITIVE_RESTART:
255         case PIPE_CAP_USER_VERTEX_BUFFERS:
256         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
257             return !r300screen->caps.has_tcl;
258 
259         /* HWTCL-only features / limitations. */
260         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
261         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
262         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
263             return r300screen->caps.has_tcl;
264         case PIPE_CAP_TGSI_TEXCOORD:
265             return 0;
266 
267         /* Texturing. */
268         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
269         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
270         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
271             /* 13 == 4096, 12 == 2048 */
272             return is_r500 ? 13 : 12;
273 
274         /* Render targets. */
275         case PIPE_CAP_MAX_RENDER_TARGETS:
276             return 4;
277         case PIPE_CAP_ENDIANNESS:
278             return PIPE_ENDIAN_LITTLE;
279 
280         case PIPE_CAP_MAX_VIEWPORTS:
281             return 1;
282 
283         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
284             return 2048;
285 
286         case PIPE_CAP_VENDOR_ID:
287                 return 0x1002;
288         case PIPE_CAP_DEVICE_ID:
289                 return r300screen->info.pci_id;
290         case PIPE_CAP_ACCELERATED:
291                 return 1;
292         case PIPE_CAP_VIDEO_MEMORY:
293                 return r300screen->info.vram_size >> 20;
294         case PIPE_CAP_UMA:
295                 return 0;
296         case PIPE_CAP_PCI_GROUP:
297             return r300screen->info.pci_domain;
298         case PIPE_CAP_PCI_BUS:
299             return r300screen->info.pci_bus;
300         case PIPE_CAP_PCI_DEVICE:
301             return r300screen->info.pci_dev;
302         case PIPE_CAP_PCI_FUNCTION:
303             return r300screen->info.pci_func;
304     }
305     return 0;
306 }
307 
r300_get_shader_param(struct pipe_screen * pscreen,enum pipe_shader_type shader,enum pipe_shader_cap param)308 static int r300_get_shader_param(struct pipe_screen *pscreen,
309                                  enum pipe_shader_type shader,
310                                  enum pipe_shader_cap param)
311 {
312    struct r300_screen* r300screen = r300_screen(pscreen);
313    boolean is_r400 = r300screen->caps.is_r400;
314    boolean is_r500 = r300screen->caps.is_r500;
315 
316    switch (shader) {
317     case PIPE_SHADER_FRAGMENT:
318         switch (param)
319         {
320         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
321             return is_r500 || is_r400 ? 512 : 96;
322         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
323             return is_r500 || is_r400 ? 512 : 64;
324         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
325             return is_r500 || is_r400 ? 512 : 32;
326         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
327             return is_r500 ? 511 : 4;
328         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
329             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
330             /* Fragment shader limits. */
331         case PIPE_SHADER_CAP_MAX_INPUTS:
332             /* 2 colors + 8 texcoords are always supported
333              * (minus fog and wpos).
334              *
335              * R500 has the ability to turn 3rd and 4th color into
336              * additional texcoords but there is no two-sided color
337              * selection then. However the facing bit can be used instead. */
338             return 10;
339         case PIPE_SHADER_CAP_MAX_OUTPUTS:
340             return 4;
341         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
342             return (is_r500 ? 256 : 32) * sizeof(float[4]);
343         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
344         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
345             return 1;
346         case PIPE_SHADER_CAP_MAX_TEMPS:
347             return is_r500 ? 128 : is_r400 ? 64 : 32;
348         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
349         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
350            return r300screen->caps.num_tex_units;
351         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
352         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
353         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
354         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
355         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
356         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
357         case PIPE_SHADER_CAP_SUBROUTINES:
358         case PIPE_SHADER_CAP_INTEGERS:
359         case PIPE_SHADER_CAP_INT64_ATOMICS:
360         case PIPE_SHADER_CAP_FP16:
361         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
362         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
363         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
364         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
365         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
366         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
367         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
368         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
369         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
370         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
371             return 0;
372         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
373             return 32;
374         case PIPE_SHADER_CAP_PREFERRED_IR:
375             return PIPE_SHADER_IR_TGSI;
376         case PIPE_SHADER_CAP_SUPPORTED_IRS:
377             return 0;
378         }
379         break;
380     case PIPE_SHADER_VERTEX:
381         switch (param)
382         {
383         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
384         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
385         case PIPE_SHADER_CAP_SUBROUTINES:
386             return 0;
387         default:;
388         }
389 
390         if (!r300screen->caps.has_tcl) {
391             return draw_get_shader_param(shader, param);
392         }
393 
394         switch (param)
395         {
396         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
397         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
398             return is_r500 ? 1024 : 256;
399         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
400             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
401         case PIPE_SHADER_CAP_MAX_INPUTS:
402             return 16;
403         case PIPE_SHADER_CAP_MAX_OUTPUTS:
404             return 10;
405         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
406             return 256 * sizeof(float[4]);
407         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
408             return 1;
409         case PIPE_SHADER_CAP_MAX_TEMPS:
410             return 32;
411         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
412         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
413             return 1;
414         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
415         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
416         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
417         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
418         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
419         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
420         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
421         case PIPE_SHADER_CAP_SUBROUTINES:
422         case PIPE_SHADER_CAP_INTEGERS:
423         case PIPE_SHADER_CAP_FP16:
424         case PIPE_SHADER_CAP_INT64_ATOMICS:
425         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
426         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
427         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
428         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
429         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
430         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
431         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
432         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
433         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
434         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
435         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
436         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
437             return 0;
438         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
439             return 32;
440         case PIPE_SHADER_CAP_PREFERRED_IR:
441             return PIPE_SHADER_IR_TGSI;
442         case PIPE_SHADER_CAP_SUPPORTED_IRS:
443             return 0;
444         }
445         break;
446     default:
447         ; /* nothing */
448     }
449     return 0;
450 }
451 
r300_get_paramf(struct pipe_screen * pscreen,enum pipe_capf param)452 static float r300_get_paramf(struct pipe_screen* pscreen,
453                              enum pipe_capf param)
454 {
455     struct r300_screen* r300screen = r300_screen(pscreen);
456 
457     switch (param) {
458         case PIPE_CAPF_MAX_LINE_WIDTH:
459         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
460         case PIPE_CAPF_MAX_POINT_WIDTH:
461         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
462             /* The maximum dimensions of the colorbuffer are our practical
463              * rendering limits. 2048 pixels should be enough for anybody. */
464             if (r300screen->caps.is_r500) {
465                 return 4096.0f;
466             } else if (r300screen->caps.is_r400) {
467                 return 4021.0f;
468             } else {
469                 return 2560.0f;
470             }
471         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
472             return 16.0f;
473         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
474             return 16.0f;
475         case PIPE_CAPF_GUARD_BAND_LEFT:
476         case PIPE_CAPF_GUARD_BAND_TOP:
477         case PIPE_CAPF_GUARD_BAND_RIGHT:
478         case PIPE_CAPF_GUARD_BAND_BOTTOM:
479             return 0.0f;
480         default:
481             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
482                          param);
483             return 0.0f;
484     }
485 }
486 
r300_get_video_param(struct pipe_screen * screen,enum pipe_video_profile profile,enum pipe_video_entrypoint entrypoint,enum pipe_video_cap param)487 static int r300_get_video_param(struct pipe_screen *screen,
488 				enum pipe_video_profile profile,
489 				enum pipe_video_entrypoint entrypoint,
490 				enum pipe_video_cap param)
491 {
492    switch (param) {
493       case PIPE_VIDEO_CAP_SUPPORTED:
494          return vl_profile_supported(screen, profile, entrypoint);
495       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
496          return 0;
497       case PIPE_VIDEO_CAP_MAX_WIDTH:
498       case PIPE_VIDEO_CAP_MAX_HEIGHT:
499          return vl_video_buffer_max_size(screen);
500       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
501          return PIPE_FORMAT_NV12;
502       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
503          return false;
504       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
505          return false;
506       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
507          return true;
508       case PIPE_VIDEO_CAP_MAX_LEVEL:
509          return vl_level_supported(screen, profile);
510       default:
511          return 0;
512    }
513 }
514 
515 /**
516  * Whether the format matches:
517  *   PIPE_FORMAT_?10?10?10?2_UNORM
518  */
519 static inline boolean
util_format_is_rgba1010102_variant(const struct util_format_description * desc)520 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
521 {
522    static const unsigned size[4] = {10, 10, 10, 2};
523    unsigned chan;
524 
525    if (desc->block.width != 1 ||
526        desc->block.height != 1 ||
527        desc->block.bits != 32)
528       return FALSE;
529 
530    for (chan = 0; chan < 4; ++chan) {
531       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
532          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
533          return FALSE;
534       if (desc->channel[chan].size != size[chan])
535          return FALSE;
536    }
537 
538    return TRUE;
539 }
540 
r300_is_blending_supported(struct r300_screen * rscreen,enum pipe_format format)541 static bool r300_is_blending_supported(struct r300_screen *rscreen,
542                                        enum pipe_format format)
543 {
544     int c;
545     const struct util_format_description *desc =
546         util_format_description(format);
547 
548     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
549         return false;
550 
551     c = util_format_get_first_non_void_channel(format);
552 
553     /* RGBA16F */
554     if (rscreen->caps.is_r500 &&
555         desc->nr_channels == 4 &&
556         desc->channel[c].size == 16 &&
557         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
558         return true;
559 
560     if (desc->channel[c].normalized &&
561         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
562         desc->channel[c].size >= 4 &&
563         desc->channel[c].size <= 10) {
564         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
565         if (desc->nr_channels >= 3)
566             return true;
567 
568         if (format == PIPE_FORMAT_R8G8_UNORM)
569             return true;
570 
571         /* R8, I8, L8, A8 */
572         if (desc->nr_channels == 1)
573             return true;
574     }
575 
576     return false;
577 }
578 
r300_is_format_supported(struct pipe_screen * screen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned usage)579 static boolean r300_is_format_supported(struct pipe_screen* screen,
580                                         enum pipe_format format,
581                                         enum pipe_texture_target target,
582                                         unsigned sample_count,
583                                         unsigned usage)
584 {
585     uint32_t retval = 0;
586     boolean is_r500 = r300_screen(screen)->caps.is_r500;
587     boolean is_r400 = r300_screen(screen)->caps.is_r400;
588     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
589                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
590                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
591                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
592                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
593     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
594                        format == PIPE_FORMAT_RGTC1_SNORM ||
595                        format == PIPE_FORMAT_LATC1_UNORM ||
596                        format == PIPE_FORMAT_LATC1_SNORM;
597     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
598                        format == PIPE_FORMAT_RGTC2_SNORM ||
599                        format == PIPE_FORMAT_LATC2_UNORM ||
600                        format == PIPE_FORMAT_LATC2_SNORM;
601     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
602                             format == PIPE_FORMAT_R16G16_FLOAT ||
603                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
604                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
605                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
606     const struct util_format_description *desc;
607 
608     if (!util_format_is_supported(format, usage))
609        return FALSE;
610 
611     /* Check multisampling support. */
612     switch (sample_count) {
613         case 0:
614         case 1:
615             break;
616         case 2:
617         case 4:
618         case 6:
619             /* No texturing and scanout. */
620             if (usage & (PIPE_BIND_SAMPLER_VIEW |
621                          PIPE_BIND_DISPLAY_TARGET |
622                          PIPE_BIND_SCANOUT)) {
623                 return FALSE;
624             }
625 
626             desc = util_format_description(format);
627 
628             if (is_r500) {
629                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
630                 if (!util_format_is_depth_or_stencil(format) &&
631                     !util_format_is_rgba8_variant(desc) &&
632                     !util_format_is_rgba1010102_variant(desc) &&
633                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
634                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
635                     return FALSE;
636                 }
637             } else {
638                 /* Only allow depth/stencil, RGBA8. */
639                 if (!util_format_is_depth_or_stencil(format) &&
640                     !util_format_is_rgba8_variant(desc)) {
641                     return FALSE;
642                 }
643             }
644             break;
645         default:
646             return FALSE;
647     }
648 
649     /* Check sampler format support. */
650     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
651         /* these two are broken for an unknown reason */
652         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
653         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
654         /* ATI1N is r5xx-only. */
655         (is_r500 || !is_ati1n) &&
656         /* ATI2N is supported on r4xx-r5xx. */
657         (is_r400 || is_r500 || !is_ati2n) &&
658         r300_is_sampler_format_supported(format)) {
659         retval |= PIPE_BIND_SAMPLER_VIEW;
660     }
661 
662     /* Check colorbuffer format support. */
663     if ((usage & (PIPE_BIND_RENDER_TARGET |
664                   PIPE_BIND_DISPLAY_TARGET |
665                   PIPE_BIND_SCANOUT |
666                   PIPE_BIND_SHARED |
667                   PIPE_BIND_BLENDABLE)) &&
668         /* 2101010 cannot be rendered to on non-r5xx. */
669         (!is_color2101010 || is_r500) &&
670         r300_is_colorbuffer_format_supported(format)) {
671         retval |= usage &
672             (PIPE_BIND_RENDER_TARGET |
673              PIPE_BIND_DISPLAY_TARGET |
674              PIPE_BIND_SCANOUT |
675              PIPE_BIND_SHARED);
676 
677         if (r300_is_blending_supported(r300_screen(screen), format)) {
678             retval |= usage & PIPE_BIND_BLENDABLE;
679         }
680     }
681 
682     /* Check depth-stencil format support. */
683     if (usage & PIPE_BIND_DEPTH_STENCIL &&
684         r300_is_zs_format_supported(format)) {
685         retval |= PIPE_BIND_DEPTH_STENCIL;
686     }
687 
688     /* Check vertex buffer format support. */
689     if (usage & PIPE_BIND_VERTEX_BUFFER) {
690         if (r300_screen(screen)->caps.has_tcl) {
691             /* Half float is supported on >= R400. */
692             if ((is_r400 || is_r500 || !is_half_float) &&
693                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
694                 retval |= PIPE_BIND_VERTEX_BUFFER;
695             }
696         } else {
697             /* SW TCL */
698             if (!util_format_is_pure_integer(format)) {
699                 retval |= PIPE_BIND_VERTEX_BUFFER;
700             }
701         }
702     }
703 
704     return retval == usage;
705 }
706 
r300_destroy_screen(struct pipe_screen * pscreen)707 static void r300_destroy_screen(struct pipe_screen* pscreen)
708 {
709     struct r300_screen* r300screen = r300_screen(pscreen);
710     struct radeon_winsys *rws = radeon_winsys(pscreen);
711 
712     if (rws && !rws->unref(rws))
713       return;
714 
715     mtx_destroy(&r300screen->cmask_mutex);
716     slab_destroy_parent(&r300screen->pool_transfers);
717 
718     if (rws)
719       rws->destroy(rws);
720 
721     FREE(r300screen);
722 }
723 
r300_fence_reference(struct pipe_screen * screen,struct pipe_fence_handle ** ptr,struct pipe_fence_handle * fence)724 static void r300_fence_reference(struct pipe_screen *screen,
725                                  struct pipe_fence_handle **ptr,
726                                  struct pipe_fence_handle *fence)
727 {
728     struct radeon_winsys *rws = r300_screen(screen)->rws;
729 
730     rws->fence_reference(ptr, fence);
731 }
732 
r300_fence_finish(struct pipe_screen * screen,struct pipe_context * ctx,struct pipe_fence_handle * fence,uint64_t timeout)733 static boolean r300_fence_finish(struct pipe_screen *screen,
734                                  struct pipe_context *ctx,
735                                  struct pipe_fence_handle *fence,
736                                  uint64_t timeout)
737 {
738     struct radeon_winsys *rws = r300_screen(screen)->rws;
739 
740     return rws->fence_wait(rws, fence, timeout);
741 }
742 
r300_screen_create(struct radeon_winsys * rws,const struct pipe_screen_config * config)743 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
744                                        const struct pipe_screen_config *config)
745 {
746     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
747 
748     if (!r300screen) {
749         FREE(r300screen);
750         return NULL;
751     }
752 
753     rws->query_info(rws, &r300screen->info);
754 
755     r300_init_debug(r300screen);
756     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
757 
758     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
759         r300screen->caps.zmask_ram = 0;
760     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
761         r300screen->caps.hiz_ram = 0;
762 
763     r300screen->rws = rws;
764     r300screen->screen.destroy = r300_destroy_screen;
765     r300screen->screen.get_name = r300_get_name;
766     r300screen->screen.get_vendor = r300_get_vendor;
767     r300screen->screen.get_device_vendor = r300_get_device_vendor;
768     r300screen->screen.get_param = r300_get_param;
769     r300screen->screen.get_shader_param = r300_get_shader_param;
770     r300screen->screen.get_paramf = r300_get_paramf;
771     r300screen->screen.get_video_param = r300_get_video_param;
772     r300screen->screen.is_format_supported = r300_is_format_supported;
773     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
774     r300screen->screen.context_create = r300_create_context;
775     r300screen->screen.fence_reference = r300_fence_reference;
776     r300screen->screen.fence_finish = r300_fence_finish;
777 
778     r300_init_screen_resource_functions(r300screen);
779 
780     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
781 
782     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
783 
784     return &r300screen->screen;
785 }
786