1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #ifndef R600_ASM_H
24 #define R600_ASM_H
25
26 #include "r600_pipe.h"
27 #include "r600_isa.h"
28 #include "tgsi/tgsi_exec.h"
29
30 struct r600_bytecode_alu_src {
31 unsigned sel;
32 unsigned chan;
33 unsigned neg;
34 unsigned abs;
35 unsigned rel;
36 unsigned kc_bank;
37 unsigned kc_rel;
38 uint32_t value;
39 };
40
41 struct r600_bytecode_alu_dst {
42 unsigned sel;
43 unsigned chan;
44 unsigned clamp;
45 unsigned write;
46 unsigned rel;
47 };
48
49 struct r600_bytecode_alu {
50 struct list_head list;
51 struct r600_bytecode_alu_src src[3];
52 struct r600_bytecode_alu_dst dst;
53 unsigned op;
54 unsigned last;
55 unsigned is_op3;
56 unsigned is_lds_idx_op;
57 unsigned execute_mask;
58 unsigned update_pred;
59 unsigned pred_sel;
60 unsigned bank_swizzle;
61 unsigned bank_swizzle_force;
62 unsigned omod;
63 unsigned index_mode;
64 unsigned lds_idx;
65 };
66
67 struct r600_bytecode_tex {
68 struct list_head list;
69 unsigned op;
70 unsigned inst_mod;
71 unsigned resource_id;
72 unsigned src_gpr;
73 unsigned src_rel;
74 unsigned dst_gpr;
75 unsigned dst_rel;
76 unsigned dst_sel_x;
77 unsigned dst_sel_y;
78 unsigned dst_sel_z;
79 unsigned dst_sel_w;
80 unsigned lod_bias;
81 unsigned coord_type_x;
82 unsigned coord_type_y;
83 unsigned coord_type_z;
84 unsigned coord_type_w;
85 int offset_x;
86 int offset_y;
87 int offset_z;
88 unsigned sampler_id;
89 unsigned src_sel_x;
90 unsigned src_sel_y;
91 unsigned src_sel_z;
92 unsigned src_sel_w;
93 /* indexed samplers/resources only on evergreen/cayman */
94 unsigned sampler_index_mode;
95 unsigned resource_index_mode;
96 };
97
98 struct r600_bytecode_vtx {
99 struct list_head list;
100 unsigned op;
101 unsigned fetch_type;
102 unsigned buffer_id;
103 unsigned src_gpr;
104 unsigned src_sel_x;
105 unsigned mega_fetch_count;
106 unsigned dst_gpr;
107 unsigned dst_sel_x;
108 unsigned dst_sel_y;
109 unsigned dst_sel_z;
110 unsigned dst_sel_w;
111 unsigned use_const_fields;
112 unsigned data_format;
113 unsigned num_format_all;
114 unsigned format_comp_all;
115 unsigned srf_mode_all;
116 unsigned offset;
117 unsigned endian;
118 unsigned buffer_index_mode;
119 };
120
121 struct r600_bytecode_gds {
122 struct list_head list;
123 unsigned op;
124 unsigned src_gpr;
125 unsigned src_rel;
126 unsigned src_sel_x;
127 unsigned src_sel_y;
128 unsigned src_sel_z;
129 unsigned src_gpr2;
130 unsigned dst_gpr;
131 unsigned dst_rel;
132 unsigned dst_sel_x;
133 unsigned dst_sel_y;
134 unsigned dst_sel_z;
135 unsigned dst_sel_w;
136 unsigned uav_index_mode;
137 unsigned uav_id;
138 unsigned alloc_consume;
139 unsigned bcast_first_req;
140 };
141
142 struct r600_bytecode_output {
143 unsigned array_base;
144 unsigned array_size;
145 unsigned comp_mask;
146 unsigned type;
147
148 unsigned op;
149
150 unsigned elem_size;
151 unsigned gpr;
152 unsigned swizzle_x;
153 unsigned swizzle_y;
154 unsigned swizzle_z;
155 unsigned swizzle_w;
156 unsigned burst_count;
157 unsigned index_gpr;
158 };
159
160 struct r600_bytecode_rat {
161 unsigned id;
162 unsigned inst;
163 unsigned index_mode;
164 };
165
166 struct r600_bytecode_kcache {
167 unsigned bank;
168 unsigned mode;
169 unsigned addr;
170 unsigned index_mode;
171 };
172
173 struct r600_bytecode_cf {
174 struct list_head list;
175
176 unsigned op;
177 unsigned addr;
178 unsigned ndw;
179 unsigned id;
180 unsigned cond;
181 unsigned pop_count;
182 unsigned count;
183 unsigned cf_addr; /* control flow addr */
184 struct r600_bytecode_kcache kcache[4];
185 unsigned r6xx_uses_waterfall;
186 unsigned eg_alu_extended;
187 unsigned barrier;
188 unsigned end_of_program;
189 unsigned mark;
190 unsigned vpm;
191 struct list_head alu;
192 struct list_head tex;
193 struct list_head vtx;
194 struct list_head gds;
195 struct r600_bytecode_output output;
196 struct r600_bytecode_rat rat;
197 struct r600_bytecode_alu *curr_bs_head;
198 struct r600_bytecode_alu *prev_bs_head;
199 struct r600_bytecode_alu *prev2_bs_head;
200 unsigned isa[2];
201 };
202
203 #define FC_NONE 0
204 #define FC_IF 1
205 #define FC_LOOP 2
206 #define FC_REP 3
207 #define FC_PUSH_VPM 4
208 #define FC_PUSH_WQM 5
209
210 struct r600_cf_stack_entry {
211 int type;
212 struct r600_bytecode_cf *start;
213 struct r600_bytecode_cf **mid; /* used to store the else point */
214 int num_mid;
215 };
216
217 #define SQ_MAX_CALL_DEPTH 0x00000020
218
219 #define AR_HANDLE_NORMAL 0
220 #define AR_HANDLE_RV6XX 1 /* except RV670 */
221
222 struct r600_stack_info {
223 /* current level of non-WQM PUSH operations
224 * (PUSH, PUSH_ELSE, ALU_PUSH_BEFORE) */
225 int push;
226 /* current level of WQM PUSH operations
227 * (PUSH, PUSH_ELSE, PUSH_WQM) */
228 int push_wqm;
229 /* current loop level */
230 int loop;
231
232 /* required depth */
233 int max_entries;
234 /* subentries per entry */
235 int entry_size;
236 };
237
238 struct r600_bytecode {
239 enum chip_class chip_class;
240 enum radeon_family family;
241 bool has_compressed_msaa_texturing;
242 int type;
243 struct list_head cf;
244 struct r600_bytecode_cf *cf_last;
245 unsigned ndw;
246 unsigned ncf;
247 unsigned ngpr;
248 unsigned nstack;
249 unsigned nlds_dw;
250 unsigned nresource;
251 unsigned force_add_cf;
252 uint32_t *bytecode;
253 uint32_t fc_sp;
254 struct r600_cf_stack_entry fc_stack[TGSI_EXEC_MAX_NESTING];
255 struct r600_stack_info stack;
256 unsigned ar_loaded;
257 unsigned ar_reg;
258 unsigned ar_chan;
259 unsigned ar_handling;
260 unsigned r6xx_nop_after_rel_dst;
261 bool index_loaded[2];
262 unsigned index_reg[2]; /* indexing register CF_INDEX_[01] */
263 unsigned debug_id;
264 struct r600_isa* isa;
265 };
266
267 /* eg_asm.c */
268 int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
269 int egcm_load_index_reg(struct r600_bytecode *bc, unsigned id, bool inside_alu_clause);
270 int eg_bytecode_gds_build(struct r600_bytecode *bc, struct r600_bytecode_gds *gds, unsigned id);
271 int eg_bytecode_alu_build(struct r600_bytecode *bc,
272 struct r600_bytecode_alu *alu, unsigned id);
273 /* r600_asm.c */
274 void r600_bytecode_init(struct r600_bytecode *bc,
275 enum chip_class chip_class,
276 enum radeon_family family,
277 bool has_compressed_msaa_texturing);
278 void r600_bytecode_clear(struct r600_bytecode *bc);
279 int r600_bytecode_add_alu(struct r600_bytecode *bc,
280 const struct r600_bytecode_alu *alu);
281 int r600_bytecode_add_vtx(struct r600_bytecode *bc,
282 const struct r600_bytecode_vtx *vtx);
283 int r600_bytecode_add_vtx_tc(struct r600_bytecode *bc,
284 const struct r600_bytecode_vtx *vtx);
285 int r600_bytecode_add_tex(struct r600_bytecode *bc,
286 const struct r600_bytecode_tex *tex);
287 int r600_bytecode_add_gds(struct r600_bytecode *bc,
288 const struct r600_bytecode_gds *gds);
289 int r600_bytecode_add_output(struct r600_bytecode *bc,
290 const struct r600_bytecode_output *output);
291 int r600_bytecode_build(struct r600_bytecode *bc);
292 int r600_bytecode_add_cf(struct r600_bytecode *bc);
293 int r600_bytecode_add_cfinst(struct r600_bytecode *bc,
294 unsigned op);
295 int r600_bytecode_add_alu_type(struct r600_bytecode *bc,
296 const struct r600_bytecode_alu *alu, unsigned type);
297 void r600_bytecode_special_constants(uint32_t value,
298 unsigned *sel, unsigned *neg, unsigned abs);
299 void r600_bytecode_disasm(struct r600_bytecode *bc);
300 void r600_bytecode_alu_read(struct r600_bytecode *bc,
301 struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
302
303 int cm_bytecode_add_cf_end(struct r600_bytecode *bc);
304
305 void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
306 unsigned count,
307 const struct pipe_vertex_element *elements);
308
309 /* r700_asm.c */
310 void r700_bytecode_cf_vtx_build(uint32_t *bytecode,
311 const struct r600_bytecode_cf *cf);
312 int r700_bytecode_alu_build(struct r600_bytecode *bc,
313 struct r600_bytecode_alu *alu, unsigned id);
314 void r700_bytecode_alu_read(struct r600_bytecode *bc,
315 struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
316 void r600_bytecode_export_read(struct r600_bytecode *bc,
317 struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
318 void eg_bytecode_export_read(struct r600_bytecode *bc,
319 struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
320
321 void r600_vertex_data_type(enum pipe_format pformat, unsigned *format,
322 unsigned *num_format, unsigned *format_comp, unsigned *endian);
323
fp64_switch(int i)324 static inline int fp64_switch(int i)
325 {
326 switch (i) {
327 case 0:
328 return 1;
329 case 1:
330 return 0;
331 case 2:
332 return 3;
333 case 3:
334 return 2;
335 }
336 return 0;
337 }
338 #endif
339