| /external/libvpx/libvpx/vpx_ports/ |
| D | asmdefs_mmi.h | 21 #define MMI_ADDU(reg1, reg2, reg3) \ argument
24 #define MMI_ADDIU(reg1, reg2, immediate) \ argument
27 #define MMI_ADDI(reg1, reg2, immediate) \ argument
30 #define MMI_SUBU(reg1, reg2, reg3) \ argument
36 #define MMI_SRL(reg1, reg2, shift) \ argument
39 #define MMI_SLL(reg1, reg2, shift) \ argument
50 #define MMI_ADDU(reg1, reg2, reg3) \ argument
53 #define MMI_ADDIU(reg1, reg2, immediate) \ argument
56 #define MMI_ADDI(reg1, reg2, immediate) \ argument
59 #define MMI_SUBU(reg1, reg2, reg3) \ argument
[all …]
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| /external/u-boot/arch/arm/lib/ |
| D | memcpy.S | 44 .macro enter reg1 reg2
48 .macro exit reg1 reg2
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/MachO/ |
| D | bad-macro.s | 5 .macro test_macro reg1, reg2
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| /external/llvm/test/MC/MachO/ |
| D | bad-macro.s | 5 .macro test_macro reg1, reg2
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| /external/u-boot/arch/arm/mach-imx/ |
| D | sip.c | 10 unsigned long reg1, unsigned long reg2) in call_imx_sip()
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| /external/libmpeg2/common/armv8/ |
| D | impeg2_neon_macros.s | 53 .macro swp reg1, reg2
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| /external/libavc/common/armv8/ |
| D | ih264_neon_macros.s | 36 .macro swp reg1, reg2
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| /external/libxaac/decoder/armv8/ |
| D | ixheaacd_sbr_qmfsyn64_winadd.s | 39 .macro swp reg1, reg2
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| D | ixheaacd_post_twiddle.s | 38 .macro swp reg1, reg2
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| D | ixheaacd_pre_twiddle.s | 47 .macro swp reg1, reg2
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| D | ixheaacd_sbr_imdct_using_fft.s | 47 .macro swp reg1, reg2
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| D | ixheaacd_imdct_using_fft.s | 47 .macro swp reg1, reg2
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| /external/u-boot/drivers/mtd/nand/ |
| D | nand_ecc.c | 68 uint8_t idx, reg1, reg2, reg3, tmp1, tmp2; in nand_calculate_ecc() local
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| /external/u-boot/post/lib_powerpc/ |
| D | three.c | 157 unsigned int reg2 = (reg + 2) % 32; in cpu_post_test_three() local
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| D | threex.c | 127 unsigned int reg2 = (reg + 2) % 32; in cpu_post_test_threex() local
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| D | rlwnm.c | 62 unsigned int reg2 = (reg + 2) % 32; in cpu_post_test_rlwnm() local
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| /external/capstone/arch/X86/ |
| D | X86Mapping.c | 47236 x86_reg reg1, reg2; member
47505 bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, x86_reg *reg2) in X86_insn_reg_intel2()
47522 bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, x86_reg *reg2) in X86_insn_reg_att2()
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| /external/libvpx/libvpx/third_party/libyuv/source/ |
| D | compare_msa.cc | 59 v4i32 reg0 = {0}, reg1 = {0}, reg2 = {0}, reg3 = {0}; in SumSquareError_MSA() local
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| D | rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
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| D | row_msa.cc | 481 v16u8 reg0, reg1, reg2, reg3; in I422ToRGB24Row_MSA() local
570 v8u16 reg0, reg1, reg2; in I422ToARGB4444Row_MSA() local
610 v8u16 reg0, reg1, reg2; in I422ToARGB1555Row_MSA() local
774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local
826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
1089 v16u8 src0, src1, src2, src3, reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_MSA() local
1163 v4u32 reg0, reg1, reg2, reg3; in ARGBMultiplyRow_MSA() local
1243 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local
1311 v8i16 reg0, reg1, reg2; in ARGBToRGB565DitherRow_MSA() local
1379 v4u32 reg0, reg1, reg2, reg3, rgba_scale; in ARGBShadeRow_MSA() local
[all …]
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| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | idct32x32_msa.c | 44 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_even_process_store() local
128 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_odd_process_store() local
354 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_even_process_store() local
434 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_odd_process_store() local
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| /external/v8/src/interpreter/ |
| D | bytecode-register.cc | 97 bool Register::AreContiguous(Register reg1, Register reg2, Register reg3, in AreContiguous()
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| /external/libyuv/files/source/ |
| D | row_msa.cc | 481 v16u8 reg0, reg1, reg2, reg3; in I422ToRGB24Row_MSA() local
570 v8u16 reg0, reg1, reg2; in I422ToARGB4444Row_MSA() local
610 v8u16 reg0, reg1, reg2; in I422ToARGB1555Row_MSA() local
774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local
826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
1085 v16u8 src0, src1, src2, src3, reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_MSA() local
1159 v4u32 reg0, reg1, reg2, reg3; in ARGBMultiplyRow_MSA() local
1237 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local
1305 v8i16 reg0, reg1, reg2; in ARGBToRGB565DitherRow_MSA() local
1373 v4u32 reg0, reg1, reg2, reg3, rgba_scale; in ARGBShadeRow_MSA() local
[all …]
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| D | rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_fragshader.c | 49 GLuint reg2 = 0; in r200SetFragShaderArg() local
|