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Searched defs:reg5 (Results 1 – 21 of 21) sorted by relevance

/external/u-boot/board/freescale/ls1043ardb/
Dcpld.c32 u8 reg5 = (u8)(reg >> 1); in cpld_set_altbank() local
54 u8 reg5 = (u8)(reg >> 1); in cpld_set_defbank() local
72 u8 reg5 = (u8)(reg >> 1); in cpld_set_nand() local
88 u8 reg5 = (u8)(reg >> 1); in cpld_set_sd() local
/external/u-boot/board/freescale/ls1046ardb/
Dcpld.c32 u8 reg5 = (u8)(reg >> 1); in cpld_set_altbank() local
54 u8 reg5 = (u8)(reg >> 1); in cpld_set_defbank() local
72 u8 reg5 = (u8)(reg >> 1); in cpld_set_sd() local
/external/u-boot/board/freescale/p2041rdb/
Dcpld.c51 u8 reg5 = CPLD_READ(sw_ctl_on); in __cpld_set_altbank() local
/external/libvpx/libvpx/vpx_dsp/mips/
Didct32x32_msa.c44 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_even_process_store() local
128 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_odd_process_store() local
354 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_even_process_store() local
434 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_odd_process_store() local
Didct16x16_msa.c16 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; in vpx_idct16_1d_rows_msa() local
110 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; in vpx_idct16_1d_columns_addblk_msa() local
/external/v8/src/interpreter/
Dbytecode-register.cc98 Register reg4, Register reg5) { in AreContiguous()
/external/libyuv/files/source/
Drotate_msa.cc85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
Drow_msa.cc774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local
826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
1237 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local
1506 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6; in ARGB1555ToARGBRow_MSA() local
1553 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in RGB565ToARGBRow_MSA() local
1648 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGB1555ToYRow_MSA() local
1705 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in RGB565ToYRow_MSA() local
2666 v4i32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in I444ToARGBRow_MSA() local
Dscale_msa.cc133 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBRowDownEvenBox_MSA() local
/external/libvpx/libvpx/third_party/libyuv/source/
Drotate_msa.cc85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
Dscale_msa.cc141 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBRowDownEvenBox_MSA() local
669 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBFilterCols_MSA() local
766 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_0_Box_MSA() local
860 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_1_Box_MSA() local
Drow_msa.cc774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local
826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
1243 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local
1512 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6; in ARGB1555ToARGBRow_MSA() local
1561 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in RGB565ToARGBRow_MSA() local
1660 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGB1555ToYRow_MSA() local
1717 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in RGB565ToYRow_MSA() local
2678 v4i32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in I444ToARGBRow_MSA() local
/external/u-boot/board/freescale/ls2080aqds/
Dls2080aqds.c175 u8 reg5; in config_board_mux() local
/external/u-boot/board/freescale/ls2080ardb/
Dls2080ardb.c183 u8 reg5; in config_board_mux() local
/external/vixl/src/aarch64/
Dassembler-aarch64.cc5940 const CPURegister& reg5, in AreAliased()
5979 const CPURegister& reg5, in AreSameSizeAndType()
5999 const CPURegister& reg5, in AreEven()
/external/v8/src/arm/
Dmacro-assembler-arm.cc2369 Register reg5, in GetRegisterThatIsNotOneOf()
/external/v8/src/ppc/
Dmacro-assembler-ppc.cc2868 Register reg4, Register reg5, in GetRegisterThatIsNotOneOf()
/external/v8/src/arm64/
Dassembler-arm64.cc220 const CPURegister& reg5, const CPURegister& reg6, in AreAliased()
257 const CPURegister& reg5, const CPURegister& reg6, in AreSameSizeAndType()
/external/v8/src/s390/
Dmacro-assembler-s390.cc2056 Register reg4, Register reg5, in GetRegisterThatIsNotOneOf()
/external/v8/src/mips/
Dmacro-assembler-mips.cc5388 Register reg5, in GetRegisterThatIsNotOneOf()
/external/v8/src/mips64/
Dmacro-assembler-mips64.cc5786 Register reg5, in GetRegisterThatIsNotOneOf()