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Searched defs:reg_list (Results 1 – 10 of 10) sorted by relevance

/external/v8/src/interpreter/
Dbytecode-decoder.cc183 RegisterList reg_list = in Decode() local
191 RegisterList reg_list = in Decode() local
208 RegisterList reg_list = DecodeRegisterListOperand( in Decode() local
Dbytecode-register-optimizer.cc427 RegisterList reg_list) { in PrepareOutputRegisterList()
447 RegisterList reg_list) { in GetInputRegisterList()
490 RegisterList reg_list) { in RegisterListAllocateEvent()
500 void BytecodeRegisterOptimizer::RegisterListFreeEvent(RegisterList reg_list) { in RegisterListFreeEvent()
Dbytecode-register-allocator.h66 Register GrowRegisterList(RegisterList* reg_list) { in GrowRegisterList()
Dbytecode-array-builder.cc237 RegisterList reg_list) { in Convert()
246 RegisterList reg_list) { in Convert()
265 RegisterList reg_list) { in Convert()
274 RegisterList reg_list) { in Convert()
284 RegisterList reg_list) { in Convert()
1553 RegisterList reg_list) { in GetInputRegisterListOperand()
1561 RegisterList reg_list) { in GetOutputRegisterListOperand()
Dinterpreter-assembler.cc283 const RegListNodePair& reg_list, int index) { in LoadRegisterFromRegisterList()
290 const RegListNodePair& reg_list, int index) { in RegisterLocationInRegisterList()
Dbytecode-generator.cc4900 RegisterList* reg_list) { in BuildPushUndefinedIntoRegisterList()
4986 RegisterList* reg_list) { in VisitAndPushIntoRegisterList()
/external/vixl/test/aarch64/
Dtest-utils-aarch64.cc379 void Clobber(MacroAssembler* masm, RegList reg_list, uint64_t const value) { in Clobber()
402 void ClobberFP(MacroAssembler* masm, RegList reg_list, double const value) { in ClobberFP()
421 void Clobber(MacroAssembler* masm, CPURegList reg_list) { in Clobber()
/external/v8/src/arm64/
Ddeoptimizer-arm64.cc22 int dst_offset, const CPURegList& reg_list, in CopyRegListToFrame()
59 void RestoreRegList(MacroAssembler* masm, const CPURegList& reg_list, in RestoreRegList()
/external/u-boot/drivers/video/exynos/
Dexynos_dp_lowlevel.c887 unsigned int reg_list[DP_LANE_CNT_4] = { in exynos_dp_get_lanex_pre_emphasis() local
901 unsigned int reg_list[DP_LANE_CNT_4] = { in exynos_dp_set_lanex_pre_emphasis() local
916 unsigned int reg_list[DP_LANE_CNT_4] = { in exynos_dp_set_lane_pre_emphasis() local
/external/mesa3d/src/compiler/nir/
Dnir.h417 #define nir_foreach_register(reg, reg_list) \ argument
419 #define nir_foreach_register_safe(reg, reg_list) \ argument