Searched defs:srsra (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/test/MC/AArch64/ |
| D | arm64-advsimd.s | 1376 srsra d0, d0, #1 define
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-advsimd.s | 1376 srsra d0, d0, #1 define
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| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1743 __ srsra(d21, d30, 63); in GenerateTestSequenceNEON() local
1744 __ srsra(v27.V16B(), v30.V16B(), 6); in GenerateTestSequenceNEON() local
1745 __ srsra(v20.V2D(), v12.V2D(), 27); in GenerateTestSequenceNEON() local
1746 __ srsra(v0.V2S(), v17.V2S(), 5); in GenerateTestSequenceNEON() local
1747 __ srsra(v14.V4H(), v16.V4H(), 15); in GenerateTestSequenceNEON() local
1748 __ srsra(v18.V4S(), v3.V4S(), 20); in GenerateTestSequenceNEON() local
1749 __ srsra(v21.V8B(), v1.V8B(), 1); in GenerateTestSequenceNEON() local
1750 __ srsra(v31.V8H(), v25.V8H(), 2); in GenerateTestSequenceNEON() local
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| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 2116 void Assembler::srsra(const VRegister& vd, const VRegister& vn, int shift) { in srsra() function in v8::internal::Assembler
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| D | simulator-logic-arm64.cc | 1487 LogicVRegister Simulator::srsra(VectorFormat vform, LogicVRegister dst, in srsra() function in v8::internal::Simulator
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 4843 void Assembler::srsra(const VRegister& vd, const VRegister& vn, int shift) { in srsra() function in vixl::aarch64::Assembler
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| D | logic-aarch64.cc | 1643 LogicVRegister Simulator::srsra(VectorFormat vform, in srsra() function in vixl::aarch64::Simulator
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