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Searched defs:sshl (Results 1 – 5 of 5) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-diagnostics.s971 sshl d0, d1, s2 define
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-diagnostics.s976 sshl d0, d1, s2 define
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc1751 __ sshl(d1, d13, d9); in GenerateTestSequenceNEON() local
1752 __ sshl(v17.V16B(), v31.V16B(), v15.V16B()); in GenerateTestSequenceNEON() local
1753 __ sshl(v13.V2D(), v16.V2D(), v0.V2D()); in GenerateTestSequenceNEON() local
1754 __ sshl(v0.V2S(), v7.V2S(), v22.V2S()); in GenerateTestSequenceNEON() local
1755 __ sshl(v23.V4H(), v19.V4H(), v4.V4H()); in GenerateTestSequenceNEON() local
1756 __ sshl(v5.V4S(), v5.V4S(), v11.V4S()); in GenerateTestSequenceNEON() local
1757 __ sshl(v23.V8B(), v27.V8B(), v7.V8B()); in GenerateTestSequenceNEON() local
1758 __ sshl(v29.V8H(), v10.V8H(), v5.V8H()); in GenerateTestSequenceNEON() local
/external/v8/src/arm64/
Dsimulator-logic-arm64.cc1545 LogicVRegister Simulator::sshl(VectorFormat vform, LogicVRegister dst, in sshl() function in v8::internal::Simulator
/external/vixl/src/aarch64/
Dlogic-aarch64.cc1722 LogicVRegister Simulator::sshl(VectorFormat vform, in sshl() function in vixl::aarch64::Simulator