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Searched defs:sysctr_ctlr (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-tegra114/
Dsysctr.h9 struct sysctr_ctlr { struct
10 u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */
11 u32 cntsr; /* 0x04: SYSCTR0_CNTSR Counter Status */
12 u32 cntcv0; /* 0x08: SYSCTR0_CNTCV0 Counter Count 31:00 */
13 u32 cntcv1; /* 0x0C: SYSCTR0_CNTCV1 Counter Count 63:32 */
14 u32 reserved1[4]; /* 0x10 - 0x1C */
15 u32 cntfid0; /* 0x20: SYSCTR0_CNTFID0 Freq Table Entry */
16 u32 cntfid1; /* 0x24: SYSCTR0_CNTFID1 Freq Table End */
17 u32 reserved2[1002]; /* 0x28 - 0xFCC */
18 u32 counterid[12]; /* 0xFD0 - 0xFxx CounterID regs, RO */
/external/u-boot/arch/arm/include/asm/arch-tegra210/
Dsysctr.h10 struct sysctr_ctlr { struct
11 u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */
12 u32 cntsr; /* 0x04: SYSCTR0_CNTSR Counter Status */
13 u32 cntcv0; /* 0x08: SYSCTR0_CNTCV0 Counter Count 31:00 */
14 u32 cntcv1; /* 0x0C: SYSCTR0_CNTCV1 Counter Count 63:32 */
15 u32 reserved1[4]; /* 0x10 - 0x1C */
16 u32 cntfid0; /* 0x20: SYSCTR0_CNTFID0 Freq Table Entry */
17 u32 cntfid1; /* 0x24: SYSCTR0_CNTFID1 Freq Table End */
18 u32 reserved2[1002]; /* 0x28 - 0xFCC */
19 u32 counterid[12]; /* 0xFD0 - 0xFxx CounterID regs, RO */
/external/u-boot/arch/arm/include/asm/arch-tegra124/
Dsysctr.h10 struct sysctr_ctlr { struct
11 u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */
12 u32 cntsr; /* 0x04: SYSCTR0_CNTSR Counter Status */
13 u32 cntcv0; /* 0x08: SYSCTR0_CNTCV0 Counter Count 31:00 */
14 u32 cntcv1; /* 0x0C: SYSCTR0_CNTCV1 Counter Count 63:32 */
15 u32 reserved1[4]; /* 0x10 - 0x1C */
16 u32 cntfid0; /* 0x20: SYSCTR0_CNTFID0 Freq Table Entry */
17 u32 cntfid1; /* 0x24: SYSCTR0_CNTFID1 Freq Table End */
18 u32 reserved2[1002]; /* 0x28 - 0xFCC */
19 u32 counterid[12]; /* 0xFD0 - 0xFxx CounterID regs, RO */