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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * MUSB OTG driver defines
4  *
5  * Copyright 2005 Mentor Graphics Corporation
6  * Copyright (C) 2005-2006 by Texas Instruments
7  * Copyright (C) 2006-2007 Nokia Corporation
8  */
9 
10 #ifndef __MUSB_CORE_H__
11 #define __MUSB_CORE_H__
12 
13 #ifndef __UBOOT__
14 #include <linux/slab.h>
15 #include <linux/list.h>
16 #include <linux/interrupt.h>
17 #include <linux/errno.h>
18 #include <linux/timer.h>
19 #include <linux/device.h>
20 #include <linux/usb.h>
21 #include <linux/usb/otg.h>
22 #else
23 #include <linux/errno.h>
24 #endif
25 #include <linux/usb/ch9.h>
26 #include <linux/usb/gadget.h>
27 #include <linux/usb/musb.h>
28 
29 struct musb;
30 struct musb_hw_ep;
31 struct musb_ep;
32 
33 /* Helper defines for struct musb->hwvers */
34 #define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
35 #define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
36 #define MUSB_HWVERS_RC		0x8000
37 #define MUSB_HWVERS_1300	0x52C
38 #define MUSB_HWVERS_1400	0x590
39 #define MUSB_HWVERS_1800	0x720
40 #define MUSB_HWVERS_1900	0x784
41 #define MUSB_HWVERS_2000	0x800
42 
43 #include "musb_debug.h"
44 #include "musb_dma.h"
45 
46 #include "musb_io.h"
47 #include "musb_regs.h"
48 
49 #include "musb_gadget.h"
50 #ifndef __UBOOT__
51 #include <linux/usb/hcd.h>
52 #endif
53 #include "musb_host.h"
54 
55 #define	is_peripheral_enabled(musb)	((musb)->board_mode != MUSB_HOST)
56 #define	is_host_enabled(musb)		((musb)->board_mode != MUSB_PERIPHERAL)
57 #define	is_otg_enabled(musb)		((musb)->board_mode == MUSB_OTG)
58 
59 /* NOTE:  otg and peripheral-only state machines start at B_IDLE.
60  * OTG or host-only go to A_IDLE when ID is sensed.
61  */
62 #define is_peripheral_active(m)		(!(m)->is_host)
63 #define is_host_active(m)		((m)->is_host)
64 
65 #ifdef CONFIG_PROC_FS
66 #include <linux/fs.h>
67 #define MUSB_CONFIG_PROC_FS
68 #endif
69 
70 /****************************** PERIPHERAL ROLE *****************************/
71 
72 #ifndef __UBOOT__
73 #define	is_peripheral_capable()	(1)
74 #else
75 #ifdef CONFIG_USB_MUSB_GADGET
76 #define	is_peripheral_capable()	(1)
77 #else
78 #define	is_peripheral_capable()	(0)
79 #endif
80 #endif
81 
82 extern irqreturn_t musb_g_ep0_irq(struct musb *);
83 extern void musb_g_tx(struct musb *, u8);
84 extern void musb_g_rx(struct musb *, u8);
85 extern void musb_g_reset(struct musb *);
86 extern void musb_g_suspend(struct musb *);
87 extern void musb_g_resume(struct musb *);
88 extern void musb_g_wakeup(struct musb *);
89 extern void musb_g_disconnect(struct musb *);
90 
91 /****************************** HOST ROLE ***********************************/
92 
93 #ifndef __UBOOT__
94 #define	is_host_capable()	(1)
95 #else
96 #ifdef CONFIG_USB_MUSB_HOST
97 #define	is_host_capable()	(1)
98 #else
99 #define	is_host_capable()	(0)
100 #endif
101 #endif
102 
103 extern irqreturn_t musb_h_ep0_irq(struct musb *);
104 extern void musb_host_tx(struct musb *, u8);
105 extern void musb_host_rx(struct musb *, u8);
106 
107 /****************************** CONSTANTS ********************************/
108 
109 #ifndef MUSB_C_NUM_EPS
110 #define MUSB_C_NUM_EPS ((u8)16)
111 #endif
112 
113 #ifndef MUSB_MAX_END0_PACKET
114 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
115 #endif
116 
117 /* host side ep0 states */
118 enum musb_h_ep0_state {
119 	MUSB_EP0_IDLE,
120 	MUSB_EP0_START,			/* expect ack of setup */
121 	MUSB_EP0_IN,			/* expect IN DATA */
122 	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
123 	MUSB_EP0_STATUS,		/* expect ack of STATUS */
124 } __attribute__ ((packed));
125 
126 /* peripheral side ep0 states */
127 enum musb_g_ep0_state {
128 	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
129 	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
130 	MUSB_EP0_STAGE_TX,		/* IN data */
131 	MUSB_EP0_STAGE_RX,		/* OUT data */
132 	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
133 	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
134 	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
135 } __attribute__ ((packed));
136 
137 /*
138  * OTG protocol constants.  See USB OTG 1.3 spec,
139  * sections 5.5 "Device Timings" and 6.6.5 "Timers".
140  */
141 #define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
142 #define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
143 #define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
144 #define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */
145 
146 
147 /*************************** REGISTER ACCESS ********************************/
148 
149 /* Endpoint registers (other than dynfifo setup) can be accessed either
150  * directly with the "flat" model, or after setting up an index register.
151  */
152 
153 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
154 		|| defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_ARCH_OMAP4)
155 /* REVISIT indexed access seemed to
156  * misbehave (on DaVinci) for at least peripheral IN ...
157  */
158 #define	MUSB_FLAT_REG
159 #endif
160 
161 /* TUSB mapping: "flat" plus ep0 special cases */
162 #if defined(CONFIG_USB_MUSB_TUSB6010) || \
163 	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
164 #define musb_ep_select(_mbase, _epnum) \
165 	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
166 #define	MUSB_EP_OFFSET			MUSB_TUSB_OFFSET
167 
168 /* "flat" mapping: each endpoint has its own i/o address */
169 #elif	defined(MUSB_FLAT_REG)
170 #define musb_ep_select(_mbase, _epnum)	(((void)(_mbase)), ((void)(_epnum)))
171 #define	MUSB_EP_OFFSET			MUSB_FLAT_OFFSET
172 
173 /* "indexed" mapping: INDEX register controls register bank select */
174 #else
175 #define musb_ep_select(_mbase, _epnum) \
176 	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
177 #define	MUSB_EP_OFFSET			MUSB_INDEXED_OFFSET
178 #endif
179 
180 /****************************** FUNCTIONS ********************************/
181 
182 #define MUSB_HST_MODE(_musb)\
183 	{ (_musb)->is_host = true; }
184 #define MUSB_DEV_MODE(_musb) \
185 	{ (_musb)->is_host = false; }
186 
187 #define test_devctl_hst_mode(_x) \
188 	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
189 
190 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
191 
192 /******************************** TYPES *************************************/
193 
194 /**
195  * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
196  * @init:	turns on clocks, sets up platform-specific registers, etc
197  * @exit:	undoes @init
198  * @set_mode:	forcefully changes operating mode
199  * @try_ilde:	tries to idle the IP
200  * @vbus_status: returns vbus status if possible
201  * @set_vbus:	forces vbus status
202  * @adjust_channel_params: pre check for standard dma channel_program func
203  * @pre_root_reset_end: called before the root usb port reset flag gets cleared
204  * @post_root_reset_end: called after the root usb port reset flag gets cleared
205  */
206 struct musb_platform_ops {
207 	int	(*init)(struct musb *musb);
208 	int	(*exit)(struct musb *musb);
209 
210 #ifndef __UBOOT__
211 	void	(*enable)(struct musb *musb);
212 #else
213 	int	(*enable)(struct musb *musb);
214 #endif
215 	void	(*disable)(struct musb *musb);
216 
217 	int	(*set_mode)(struct musb *musb, u8 mode);
218 	void	(*try_idle)(struct musb *musb, unsigned long timeout);
219 
220 	int	(*vbus_status)(struct musb *musb);
221 	void	(*set_vbus)(struct musb *musb, int on);
222 
223 	int	(*adjust_channel_params)(struct dma_channel *channel,
224 				u16 packet_sz, u8 *mode,
225 				dma_addr_t *dma_addr, u32 *len);
226 	void	(*pre_root_reset_end)(struct musb *musb);
227 	void	(*post_root_reset_end)(struct musb *musb);
228 };
229 
230 /*
231  * struct musb_hw_ep - endpoint hardware (bidirectional)
232  *
233  * Ordered slightly for better cacheline locality.
234  */
235 struct musb_hw_ep {
236 	struct musb		*musb;
237 	void __iomem		*fifo;
238 	void __iomem		*regs;
239 
240 #if defined(CONFIG_USB_MUSB_TUSB6010) || \
241 	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
242 	void __iomem		*conf;
243 #endif
244 
245 	/* index in musb->endpoints[]  */
246 	u8			epnum;
247 
248 	/* hardware configuration, possibly dynamic */
249 	bool			is_shared_fifo;
250 	bool			tx_double_buffered;
251 	bool			rx_double_buffered;
252 	u16			max_packet_sz_tx;
253 	u16			max_packet_sz_rx;
254 
255 	struct dma_channel	*tx_channel;
256 	struct dma_channel	*rx_channel;
257 
258 #if defined(CONFIG_USB_MUSB_TUSB6010) || \
259 	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
260 	/* TUSB has "asynchronous" and "synchronous" dma modes */
261 	dma_addr_t		fifo_async;
262 	dma_addr_t		fifo_sync;
263 	void __iomem		*fifo_sync_va;
264 #endif
265 
266 	void __iomem		*target_regs;
267 
268 	/* currently scheduled peripheral endpoint */
269 	struct musb_qh		*in_qh;
270 	struct musb_qh		*out_qh;
271 
272 	u8			rx_reinit;
273 	u8			tx_reinit;
274 
275 	/* peripheral side */
276 	struct musb_ep		ep_in;			/* TX */
277 	struct musb_ep		ep_out;			/* RX */
278 };
279 
next_in_request(struct musb_hw_ep * hw_ep)280 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
281 {
282 	return next_request(&hw_ep->ep_in);
283 }
284 
next_out_request(struct musb_hw_ep * hw_ep)285 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
286 {
287 	return next_request(&hw_ep->ep_out);
288 }
289 
290 struct musb_csr_regs {
291 	/* FIFO registers */
292 	u16 txmaxp, txcsr, rxmaxp, rxcsr;
293 	u16 rxfifoadd, txfifoadd;
294 	u8 txtype, txinterval, rxtype, rxinterval;
295 	u8 rxfifosz, txfifosz;
296 	u8 txfunaddr, txhubaddr, txhubport;
297 	u8 rxfunaddr, rxhubaddr, rxhubport;
298 };
299 
300 struct musb_context_registers {
301 
302 	u8 power;
303 	u16 intrtxe, intrrxe;
304 	u8 intrusbe;
305 	u16 frame;
306 	u8 index, testmode;
307 
308 	u8 devctl, busctl, misc;
309 	u32 otg_interfsel;
310 
311 	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
312 };
313 
314 /*
315  * struct musb - Driver instance data.
316  */
317 struct musb {
318 	/* device lock */
319 	spinlock_t		lock;
320 
321 	const struct musb_platform_ops *ops;
322 	struct musb_context_registers context;
323 
324 	irqreturn_t		(*isr)(int, void *);
325 	struct work_struct	irq_work;
326 	u16			hwvers;
327 
328 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
329 #define MUSB_PORT_STAT_RESUME	(1 << 31)
330 
331 	u32			port1_status;
332 
333 	unsigned long		rh_timer;
334 
335 	enum musb_h_ep0_state	ep0_stage;
336 
337 	/* bulk traffic normally dedicates endpoint hardware, and each
338 	 * direction has its own ring of host side endpoints.
339 	 * we try to progress the transfer at the head of each endpoint's
340 	 * queue until it completes or NAKs too much; then we try the next
341 	 * endpoint.
342 	 */
343 	struct musb_hw_ep	*bulk_ep;
344 
345 	struct list_head	control;	/* of musb_qh */
346 	struct list_head	in_bulk;	/* of musb_qh */
347 	struct list_head	out_bulk;	/* of musb_qh */
348 
349 	struct timer_list	otg_timer;
350 	struct notifier_block	nb;
351 
352 	struct dma_controller	*dma_controller;
353 
354 	struct device		*controller;
355 	void __iomem		*ctrl_base;
356 	void __iomem		*mregs;
357 
358 #if defined(CONFIG_USB_MUSB_TUSB6010) || \
359 	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
360 	dma_addr_t		async;
361 	dma_addr_t		sync;
362 	void __iomem		*sync_va;
363 #endif
364 
365 	/* passed down from chip/board specific irq handlers */
366 	u8			int_usb;
367 	u16			int_rx;
368 	u16			int_tx;
369 
370 	struct usb_phy		*xceiv;
371 
372 	int nIrq;
373 	unsigned		irq_wake:1;
374 
375 	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
376 #define control_ep		endpoints
377 
378 #define VBUSERR_RETRY_COUNT	3
379 	u16			vbuserr_retry;
380 	u16 epmask;
381 	u8 nr_endpoints;
382 
383 	u8 board_mode;		/* enum musb_mode */
384 	int			(*board_set_power)(int state);
385 
386 	u8			min_power;	/* vbus for periph, in mA/2 */
387 
388 	bool			is_host;
389 
390 	int			a_wait_bcon;	/* VBUS timeout in msecs */
391 	unsigned long		idle_timeout;	/* Next timeout in jiffies */
392 
393 	/* active means connected and not suspended */
394 	unsigned		is_active:1;
395 
396 	unsigned is_multipoint:1;
397 	unsigned ignore_disconnect:1;	/* during bus resets */
398 
399 	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
400 	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
401 	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */
402 
403 	unsigned		bulk_split:1;
404 #define	can_bulk_split(musb,type) \
405 	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
406 
407 	unsigned		bulk_combine:1;
408 #define	can_bulk_combine(musb,type) \
409 	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
410 
411 	/* is_suspended means USB B_PERIPHERAL suspend */
412 	unsigned		is_suspended:1;
413 
414 	/* may_wakeup means remote wakeup is enabled */
415 	unsigned		may_wakeup:1;
416 
417 	/* is_self_powered is reported in device status and the
418 	 * config descriptor.  is_bus_powered means B_PERIPHERAL
419 	 * draws some VBUS current; both can be true.
420 	 */
421 	unsigned		is_self_powered:1;
422 	unsigned		is_bus_powered:1;
423 
424 	unsigned		set_address:1;
425 	unsigned		test_mode:1;
426 	unsigned		softconnect:1;
427 
428 	u8			address;
429 	u8			test_mode_nr;
430 	u16			ackpend;		/* ep0 */
431 	enum musb_g_ep0_state	ep0_state;
432 	struct usb_gadget	g;			/* the gadget */
433 	struct usb_gadget_driver *gadget_driver;	/* its driver */
434 
435 	/*
436 	 * FIXME: Remove this flag.
437 	 *
438 	 * This is only added to allow Blackfin to work
439 	 * with current driver. For some unknown reason
440 	 * Blackfin doesn't work with double buffering
441 	 * and that's enabled by default.
442 	 *
443 	 * We added this flag to forcefully disable double
444 	 * buffering until we get it working.
445 	 */
446 	unsigned                double_buffer_not_ok:1;
447 
448 	struct musb_hdrc_config	*config;
449 
450 #ifdef MUSB_CONFIG_PROC_FS
451 	struct proc_dir_entry *proc_entry;
452 #endif
453 };
454 
gadget_to_musb(struct usb_gadget * g)455 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
456 {
457 	return container_of(g, struct musb, g);
458 }
459 
musb_read_fifosize(struct musb * musb,struct musb_hw_ep * hw_ep,u8 epnum)460 static inline int musb_read_fifosize(struct musb *musb,
461 		struct musb_hw_ep *hw_ep, u8 epnum)
462 {
463 	void *mbase = musb->mregs;
464 	u8 reg = 0;
465 
466 	/* read from core using indexed model */
467 	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
468 	/* 0's returned when no more endpoints */
469 	if (!reg)
470 		return -ENODEV;
471 
472 	musb->nr_endpoints++;
473 	musb->epmask |= (1 << epnum);
474 
475 	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
476 
477 	/* shared TX/RX FIFO? */
478 	if ((reg & 0xf0) == 0xf0) {
479 		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
480 		hw_ep->is_shared_fifo = true;
481 		return 0;
482 	} else {
483 		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
484 		hw_ep->is_shared_fifo = false;
485 	}
486 
487 	return 0;
488 }
489 
musb_configure_ep0(struct musb * musb)490 static inline void musb_configure_ep0(struct musb *musb)
491 {
492 	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
493 	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
494 	musb->endpoints[0].is_shared_fifo = true;
495 }
496 
497 /***************************** Glue it together *****************************/
498 
499 extern const char musb_driver_name[];
500 
501 #ifndef __UBOOT__
502 extern void musb_start(struct musb *musb);
503 #else
504 extern int musb_start(struct musb *musb);
505 #endif
506 extern void musb_stop(struct musb *musb);
507 
508 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
509 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
510 
511 extern void musb_load_testpacket(struct musb *);
512 
513 extern irqreturn_t musb_interrupt(struct musb *);
514 
515 extern void musb_hnp_stop(struct musb *musb);
516 
musb_platform_set_vbus(struct musb * musb,int is_on)517 static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
518 {
519 	if (musb->ops->set_vbus)
520 		musb->ops->set_vbus(musb, is_on);
521 }
522 
523 #ifndef __UBOOT__
musb_platform_enable(struct musb * musb)524 static inline void musb_platform_enable(struct musb *musb)
525 {
526 	if (musb->ops->enable)
527 		musb->ops->enable(musb);
528 }
529 #else
musb_platform_enable(struct musb * musb)530 static inline int musb_platform_enable(struct musb *musb)
531 {
532 	if (!musb->ops->enable)
533 		return 0;
534 
535 	return musb->ops->enable(musb);
536 }
537 #endif
538 
musb_platform_disable(struct musb * musb)539 static inline void musb_platform_disable(struct musb *musb)
540 {
541 	if (musb->ops->disable)
542 		musb->ops->disable(musb);
543 }
544 
musb_platform_set_mode(struct musb * musb,u8 mode)545 static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
546 {
547 	if (!musb->ops->set_mode)
548 		return 0;
549 
550 	return musb->ops->set_mode(musb, mode);
551 }
552 
musb_platform_try_idle(struct musb * musb,unsigned long timeout)553 static inline void musb_platform_try_idle(struct musb *musb,
554 		unsigned long timeout)
555 {
556 	if (musb->ops->try_idle)
557 		musb->ops->try_idle(musb, timeout);
558 }
559 
musb_platform_get_vbus_status(struct musb * musb)560 static inline int musb_platform_get_vbus_status(struct musb *musb)
561 {
562 	if (!musb->ops->vbus_status)
563 		return 0;
564 
565 	return musb->ops->vbus_status(musb);
566 }
567 
musb_platform_init(struct musb * musb)568 static inline int musb_platform_init(struct musb *musb)
569 {
570 	if (!musb->ops->init)
571 		return -EINVAL;
572 
573 	return musb->ops->init(musb);
574 }
575 
musb_platform_exit(struct musb * musb)576 static inline int musb_platform_exit(struct musb *musb)
577 {
578 	if (!musb->ops->exit)
579 		return -EINVAL;
580 
581 	return musb->ops->exit(musb);
582 }
583 
584 #ifdef __UBOOT__
585 struct musb *
586 musb_init_controller(struct musb_hdrc_platform_data *plat, struct device *dev,
587 			     void *ctrl);
588 #endif
589 #endif	/* __MUSB_CORE_H__ */
590