| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
| D | ucvtf.s | 10 ucvtf z0.h, p0/m, z0.h label
16 ucvtf z0.h, p0/m, z0.s label
22 ucvtf z0.h, p0/m, z0.d label
28 ucvtf z0.s, p0/m, z0.s label
34 ucvtf z0.s, p0/m, z0.d label
40 ucvtf z0.d, p0/m, z0.s label
46 ucvtf z0.d, p0/m, z0.d label
62 ucvtf z5.d, p0/m, z0.d label
74 ucvtf z5.d, p0/m, z0.d label
|
| D | ucvtf-diagnostics.s | 3 ucvtf z0.s, p0/m, z0.h label
8 ucvtf z0.d, p0/m, z0.h label
17 ucvtf z0.h, p8/m, z0.h label
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-fp-encoding.s | 504 ucvtf d1, w2 define
505 ucvtf d1, w2, #1 define
510 ucvtf d1, x2 define
511 ucvtf d1, x2, #1 define
|
| D | arm64-advsimd.s | 1379 ucvtf d0, d0, #2 define
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-fp-encoding.s | 504 ucvtf d1, w2 define
505 ucvtf d1, w2, #1 define
510 ucvtf d1, x2 define
511 ucvtf d1, x2, #1 define
|
| D | arm64-advsimd.s | 1379 ucvtf d0, d0, #2 define
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 592 __ ucvtf(d0, d9); in GenerateTestSequenceFP() local
593 __ ucvtf(d5, d22, 47); in GenerateTestSequenceFP() local
594 __ ucvtf(d30, w27); in GenerateTestSequenceFP() local
595 __ ucvtf(d3, w19, 1); in GenerateTestSequenceFP() local
596 __ ucvtf(d28, x21); in GenerateTestSequenceFP() local
597 __ ucvtf(d27, x30, 35); in GenerateTestSequenceFP() local
598 __ ucvtf(s11, s5); in GenerateTestSequenceFP() local
599 __ ucvtf(s0, s23, 14); in GenerateTestSequenceFP() local
600 __ ucvtf(s20, w19); in GenerateTestSequenceFP() local
601 __ ucvtf(s21, w22, 18); in GenerateTestSequenceFP() local
[all …]
|
| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 3208 void Assembler::ucvtf(const VRegister& vd, const VRegister& vn, int fbits) { in ucvtf() function in v8::internal::Assembler
3228 void Assembler::ucvtf(const VRegister& fd, const Register& rn, int fbits) { in ucvtf() function in v8::internal::Assembler
|
| D | simulator-logic-arm64.cc | 4170 LogicVRegister Simulator::ucvtf(VectorFormat vform, LogicVRegister dst, in ucvtf() function in v8::internal::Simulator
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 3047 void Assembler::ucvtf(const VRegister& vd, const VRegister& vn, int fbits) { in ucvtf() function in vixl::aarch64::Assembler
3098 void Assembler::ucvtf(const VRegister& vd, const Register& rn, int fbits) { in ucvtf() function in vixl::aarch64::Assembler
|
| D | logic-aarch64.cc | 5315 LogicVRegister Simulator::ucvtf(VectorFormat vform, in ucvtf() function in vixl::aarch64::Simulator
|