1 //===--- InfoByHwMode.h -----------------------------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 // Classes that implement data parameterized by HW modes for instruction
10 // selection. Currently it is ValueTypeByHwMode (parameterized ValueType),
11 // and RegSizeInfoByHwMode (parameterized register/spill size and alignment
12 // data).
13 //===----------------------------------------------------------------------===//
14
15 #ifndef LLVM_UTILS_TABLEGEN_INFOBYHWMODE_H
16 #define LLVM_UTILS_TABLEGEN_INFOBYHWMODE_H
17
18 #include "CodeGenHwModes.h"
19 #include "llvm/Support/MachineValueType.h"
20
21 #include <map>
22 #include <set>
23 #include <string>
24 #include <vector>
25
26 namespace llvm {
27
28 struct CodeGenHwModes;
29 class Record;
30 class raw_ostream;
31
32 template <typename InfoT> struct InfoByHwMode;
33
34 std::string getModeName(unsigned Mode);
35
36 enum : unsigned {
37 DefaultMode = CodeGenHwModes::DefaultMode,
38 };
39
40 template <typename InfoT>
union_modes(const InfoByHwMode<InfoT> & A,const InfoByHwMode<InfoT> & B)41 std::vector<unsigned> union_modes(const InfoByHwMode<InfoT> &A,
42 const InfoByHwMode<InfoT> &B) {
43 std::vector<unsigned> V;
44 std::set<unsigned> U;
45 for (const auto &P : A)
46 U.insert(P.first);
47 for (const auto &P : B)
48 U.insert(P.first);
49 // Make sure that the default mode is last on the list.
50 bool HasDefault = U.count(DefaultMode);
51 for (unsigned M : U)
52 if (M != DefaultMode)
53 V.push_back(M);
54 if (HasDefault)
55 V.push_back(DefaultMode);
56 return V;
57 }
58
59 template <typename InfoT>
60 struct InfoByHwMode {
61 typedef std::map<unsigned,InfoT> MapType;
62 typedef typename MapType::value_type PairType;
63 typedef typename MapType::iterator iterator;
64 typedef typename MapType::const_iterator const_iterator;
65
66 InfoByHwMode() = default;
InfoByHwModeInfoByHwMode67 InfoByHwMode(const MapType &M) : Map(M) {}
68
69 LLVM_ATTRIBUTE_ALWAYS_INLINE
beginInfoByHwMode70 iterator begin() { return Map.begin(); }
71 LLVM_ATTRIBUTE_ALWAYS_INLINE
endInfoByHwMode72 iterator end() { return Map.end(); }
73 LLVM_ATTRIBUTE_ALWAYS_INLINE
beginInfoByHwMode74 const_iterator begin() const { return Map.begin(); }
75 LLVM_ATTRIBUTE_ALWAYS_INLINE
endInfoByHwMode76 const_iterator end() const { return Map.end(); }
77 LLVM_ATTRIBUTE_ALWAYS_INLINE
emptyInfoByHwMode78 bool empty() const { return Map.empty(); }
79
80 LLVM_ATTRIBUTE_ALWAYS_INLINE
hasModeInfoByHwMode81 bool hasMode(unsigned M) const { return Map.find(M) != Map.end(); }
82 LLVM_ATTRIBUTE_ALWAYS_INLINE
hasDefaultInfoByHwMode83 bool hasDefault() const { return hasMode(DefaultMode); }
84
getInfoByHwMode85 InfoT &get(unsigned Mode) {
86 if (!hasMode(Mode)) {
87 assert(hasMode(DefaultMode));
88 Map.insert({Mode, Map.at(DefaultMode)});
89 }
90 return Map.at(Mode);
91 }
getInfoByHwMode92 const InfoT &get(unsigned Mode) const {
93 auto F = Map.find(Mode);
94 if (Mode != DefaultMode && F == Map.end())
95 F = Map.find(DefaultMode);
96 assert(F != Map.end());
97 return F->second;
98 }
99
100 LLVM_ATTRIBUTE_ALWAYS_INLINE
isSimpleInfoByHwMode101 bool isSimple() const {
102 return Map.size() == 1 && Map.begin()->first == DefaultMode;
103 }
104 LLVM_ATTRIBUTE_ALWAYS_INLINE
getSimpleInfoByHwMode105 InfoT getSimple() const {
106 assert(isSimple());
107 return Map.begin()->second;
108 }
makeSimpleInfoByHwMode109 void makeSimple(unsigned Mode) {
110 assert(hasMode(Mode) || hasDefault());
111 InfoT I = get(Mode);
112 Map.clear();
113 Map.insert(std::make_pair(DefaultMode, I));
114 }
115
116 MapType Map;
117 };
118
119 struct ValueTypeByHwMode : public InfoByHwMode<MVT> {
120 ValueTypeByHwMode(Record *R, const CodeGenHwModes &CGH);
ValueTypeByHwModeValueTypeByHwMode121 ValueTypeByHwMode(MVT T) { Map.insert({DefaultMode,T}); }
122 ValueTypeByHwMode() = default;
123
124 bool operator== (const ValueTypeByHwMode &T) const;
125 bool operator< (const ValueTypeByHwMode &T) const;
126
isValidValueTypeByHwMode127 bool isValid() const {
128 return !Map.empty();
129 }
getTypeValueTypeByHwMode130 MVT getType(unsigned Mode) const { return get(Mode); }
131 MVT &getOrCreateTypeForMode(unsigned Mode, MVT Type);
132
133 static StringRef getMVTName(MVT T);
134 void writeToStream(raw_ostream &OS) const;
135 void dump() const;
136 };
137
138 ValueTypeByHwMode getValueTypeByHwMode(Record *Rec,
139 const CodeGenHwModes &CGH);
140
141 struct RegSizeInfo {
142 unsigned RegSize;
143 unsigned SpillSize;
144 unsigned SpillAlignment;
145
146 RegSizeInfo(Record *R, const CodeGenHwModes &CGH);
147 RegSizeInfo() = default;
148 bool operator< (const RegSizeInfo &I) const;
149 bool operator== (const RegSizeInfo &I) const {
150 return std::tie(RegSize, SpillSize, SpillAlignment) ==
151 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
152 }
153 bool operator!= (const RegSizeInfo &I) const {
154 return !(*this == I);
155 }
156
157 bool isSubClassOf(const RegSizeInfo &I) const;
158 void writeToStream(raw_ostream &OS) const;
159 };
160
161 struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {
162 RegSizeInfoByHwMode(Record *R, const CodeGenHwModes &CGH);
163 RegSizeInfoByHwMode() = default;
164 bool operator< (const RegSizeInfoByHwMode &VI) const;
165 bool operator== (const RegSizeInfoByHwMode &VI) const;
166 bool operator!= (const RegSizeInfoByHwMode &VI) const {
167 return !(*this == VI);
168 }
169
170 bool isSubClassOf(const RegSizeInfoByHwMode &I) const;
171 bool hasStricterSpillThan(const RegSizeInfoByHwMode &I) const;
172
173 void writeToStream(raw_ostream &OS) const;
174 };
175
176 raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T);
177 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T);
178 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T);
179
180 } // namespace llvm
181
182 #endif // LLVM_UTILS_TABLEGEN_INFOBYHWMODE_H
183