1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2016 Socionext Inc.
4 */
5
6 #include <common.h>
7 #include <spl.h>
8 #include <linux/bitops.h>
9 #include <linux/io.h>
10
11 #include "../init.h"
12 #include "../sc64-regs.h"
13 #include "../sg-regs.h"
14
15 #define SDCTRL_EMMC_HW_RESET 0x59810280
16
uniphier_ld11_clk_init(void)17 void uniphier_ld11_clk_init(void)
18 {
19 /* if booted from a device other than USB, without stand-by MPU */
20 if ((readl(SG_PINMON0) & BIT(27)) &&
21 uniphier_boot_device_raw() != BOOT_DEVICE_USB) {
22 writel(1, SG_ETPHYPSHUT);
23 writel(1, SG_ETPHYCNT);
24
25 udelay(1); /* wait for regulator level 1.1V -> 2.5V */
26
27 writel(3, SG_ETPHYCNT);
28 writel(3, SG_ETPHYPSHUT);
29 writel(7, SG_ETPHYCNT);
30 }
31
32 /* TODO: use "mmc-pwrseq-emmc" */
33 writel(1, SDCTRL_EMMC_HW_RESET);
34
35 #ifdef CONFIG_USB_EHCI_HCD
36 {
37 /* FIXME: the current clk driver can not handle parents */
38 u32 tmp;
39 int ch;
40
41 tmp = readl(SC_CLKCTRL4);
42 tmp |= BIT(10) | BIT(8); /* MIO, STDMAC */
43 writel(tmp, SC_CLKCTRL4);
44
45 for (ch = 0; ch < 3; ch++) {
46 void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL;
47
48 writel(0x82280600, phyctrl + 8 * ch);
49 writel(0x00000106, phyctrl + 8 * ch + 4);
50 }
51 }
52 #endif
53 }
54