Searched defs:uqrshrn (Results 1 – 5 of 5) sorted by relevance
/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 2322 __ uqrshrn(b11, h26, 4); in GenerateTestSequenceNEON() local 2323 __ uqrshrn(h7, s30, 5); in GenerateTestSequenceNEON() local 2324 __ uqrshrn(s10, d8, 21); in GenerateTestSequenceNEON() local 2325 __ uqrshrn(v15.V2S(), v6.V2D(), 11); in GenerateTestSequenceNEON() local 2326 __ uqrshrn(v5.V4H(), v26.V4S(), 12); in GenerateTestSequenceNEON() local 2327 __ uqrshrn(v28.V8B(), v25.V8H(), 5); in GenerateTestSequenceNEON() local
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/external/v8/src/arm64/ |
D | assembler-arm64.cc | 2196 void Assembler::uqrshrn(const VRegister& vd, const VRegister& vn, int shift) { in uqrshrn() function in v8::internal::Assembler
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D | simulator-logic-arm64.cc | 2240 LogicVRegister Simulator::uqrshrn(VectorFormat vform, LogicVRegister dst, in uqrshrn() function in v8::internal::Simulator
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 4955 void Assembler::uqrshrn(const VRegister& vd, const VRegister& vn, int shift) { in uqrshrn() function in vixl::aarch64::Assembler
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D | logic-aarch64.cc | 2738 LogicVRegister Simulator::uqrshrn(VectorFormat vform, in uqrshrn() function in vixl::aarch64::Simulator
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