Searched defs:ursra (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/test/MC/AArch64/ |
| D | arm64-advsimd.s | 1393 ursra d0, d0, #1 define
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-advsimd.s | 1393 ursra d0, d0, #1 define
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| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2408 __ ursra(d27, d16, 45); in GenerateTestSequenceNEON() local
2409 __ ursra(v18.V16B(), v17.V16B(), 3); in GenerateTestSequenceNEON() local
2410 __ ursra(v26.V2D(), v28.V2D(), 58); in GenerateTestSequenceNEON() local
2411 __ ursra(v8.V2S(), v22.V2S(), 31); in GenerateTestSequenceNEON() local
2412 __ ursra(v31.V4H(), v4.V4H(), 7); in GenerateTestSequenceNEON() local
2413 __ ursra(v31.V4S(), v15.V4S(), 2); in GenerateTestSequenceNEON() local
2414 __ ursra(v3.V8B(), v1.V8B(), 5); in GenerateTestSequenceNEON() local
2415 __ ursra(v18.V8H(), v14.V8H(), 13); in GenerateTestSequenceNEON() local
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| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 2121 void Assembler::ursra(const VRegister& vd, const VRegister& vn, int shift) { in ursra() function in v8::internal::Assembler
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| D | simulator-logic-arm64.cc | 1494 LogicVRegister Simulator::ursra(VectorFormat vform, LogicVRegister dst, in ursra() function in v8::internal::Simulator
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 4850 void Assembler::ursra(const VRegister& vd, const VRegister& vn, int shift) { in ursra() function in vixl::aarch64::Assembler
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| D | logic-aarch64.cc | 1653 LogicVRegister Simulator::ursra(VectorFormat vform, in ursra() function in vixl::aarch64::Simulator
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