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Searched defs:usra (Results 1 – 7 of 7) sorted by relevance

/external/llvm/test/MC/AArch64/
Darm64-advsimd.s1395 usra d0, d0, #1 define
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darm64-advsimd.s1395 usra d0, d0, #1 define
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc2449 __ usra(d28, d27, 37); in GenerateTestSequenceNEON() local
2450 __ usra(v5.V16B(), v22.V16B(), 5); in GenerateTestSequenceNEON() local
2451 __ usra(v2.V2D(), v19.V2D(), 33); in GenerateTestSequenceNEON() local
2452 __ usra(v0.V2S(), v0.V2S(), 21); in GenerateTestSequenceNEON() local
2453 __ usra(v7.V4H(), v6.V4H(), 12); in GenerateTestSequenceNEON() local
2454 __ usra(v4.V4S(), v17.V4S(), 9); in GenerateTestSequenceNEON() local
2455 __ usra(v9.V8B(), v12.V8B(), 7); in GenerateTestSequenceNEON() local
2456 __ usra(v3.V8H(), v27.V8H(), 14); in GenerateTestSequenceNEON() local
/external/v8/src/arm64/
Dassembler-arm64.cc2111 void Assembler::usra(const VRegister& vd, const VRegister& vn, int shift) { in usra() function in v8::internal::Assembler
Dsimulator-logic-arm64.cc1480 LogicVRegister Simulator::usra(VectorFormat vform, LogicVRegister dst, in usra() function in v8::internal::Simulator
/external/vixl/src/aarch64/
Dassembler-aarch64.cc4836 void Assembler::usra(const VRegister& vd, const VRegister& vn, int shift) { in usra() function in vixl::aarch64::Assembler
Dlogic-aarch64.cc1633 LogicVRegister Simulator::usra(VectorFormat vform, in usra() function in vixl::aarch64::Simulator