1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * omap_wdt.h 4 * 5 * OMAP Watchdog header file 6 * 7 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ 8 */ 9 10 #ifndef __OMAP_WDT_H__ 11 #define __OMAP_WDT_H__ 12 13 /* 14 * Watchdog: 15 * Using the prescaler, the OMAP watchdog could go for many 16 * months before firing. These limits work without scaling, 17 * with the 60 second default assumed by most tools and docs. 18 */ 19 #define TIMER_MARGIN_MAX (24 * 60 * 60) /* 1 day */ 20 #define TIMER_MARGIN_DEFAULT 60 /* 60 secs */ 21 #define TIMER_MARGIN_MIN 1 22 23 #define PTV 0 /* prescale */ 24 #define GET_WLDR_VAL(secs) (0xffffffff - ((secs) * (32768/(1<<PTV))) + 1) 25 #define WDT_WWPS_PEND_WCLR BIT(0) 26 #define WDT_WWPS_PEND_WLDR BIT(2) 27 #define WDT_WWPS_PEND_WTGR BIT(3) 28 #define WDT_WWPS_PEND_WSPR BIT(4) 29 30 #define WDT_WCLR_PRE BIT(5) 31 #define WDT_WCLR_PTV_OFF 2 32 33 /* Watchdog timer registers */ 34 struct wd_timer { 35 unsigned int resv1[4]; 36 unsigned int wdtwdsc; /* offset 0x010 */ 37 unsigned int wdtwdst; /* offset 0x014 */ 38 unsigned int wdtwisr; /* offset 0x018 */ 39 unsigned int wdtwier; /* offset 0x01C */ 40 unsigned int wdtwwer; /* offset 0x020 */ 41 unsigned int wdtwclr; /* offset 0x024 */ 42 unsigned int wdtwcrr; /* offset 0x028 */ 43 unsigned int wdtwldr; /* offset 0x02C */ 44 unsigned int wdtwtgr; /* offset 0x030 */ 45 unsigned int wdtwwps; /* offset 0x034 */ 46 unsigned int resv2[3]; 47 unsigned int wdtwdly; /* offset 0x044 */ 48 unsigned int wdtwspr; /* offset 0x048 */ 49 unsigned int resv3[1]; 50 unsigned int wdtwqeoi; /* offset 0x050 */ 51 unsigned int wdtwqstar; /* offset 0x054 */ 52 unsigned int wdtwqsta; /* offset 0x058 */ 53 unsigned int wdtwqens; /* offset 0x05C */ 54 unsigned int wdtwqenc; /* offset 0x060 */ 55 unsigned int resv4[39]; 56 unsigned int wdt_unfr; /* offset 0x100 */ 57 }; 58 59 #endif /* __OMAP_WDT_H__ */ 60