1 /* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23 #ifndef R300_CHIPSET_H 24 #define R300_CHIPSET_H 25 26 #include "pipe/p_compiler.h" 27 28 /* these are sizes in dwords */ 29 #define R300_HIZ_LIMIT 10240 30 #define RV530_HIZ_LIMIT 15360 31 32 /* rv3xx have only one pipe */ 33 #define PIPE_ZMASK_SIZE 4096 34 #define RV3xx_ZMASK_SIZE 5120 35 36 /* The size of a compressed tile. Each compressed tile takes 2 bits 37 * in the ZMASK RAM, so there is always 16 tiles per one dword. */ 38 enum r300_zmask_compression { 39 R300_ZCOMP_4X4 = 4, 40 R300_ZCOMP_8X8 = 8 41 }; 42 43 /* Structure containing all the possible information about a specific Radeon 44 * in the R3xx, R4xx, and R5xx families. */ 45 struct r300_capabilities { 46 /* Chipset family */ 47 int family; 48 /* The number of vertex floating-point units */ 49 unsigned num_vert_fpus; 50 /* The number of texture units. */ 51 unsigned num_tex_units; 52 /* Whether or not TCL is physically present */ 53 boolean has_tcl; 54 /* Some chipsets do not have HiZ RAM - other have varying amounts. */ 55 int hiz_ram; 56 /* Some chipsets have zmask ram per pipe some don't. */ 57 int zmask_ram; 58 /* CMASK is for MSAA colorbuffer compression and fast clear. */ 59 boolean has_cmask; 60 /* Compression mode for ZMASK. */ 61 enum r300_zmask_compression z_compress; 62 /* Whether or not this is RV350 or newer, including all r400 and r500 63 * chipsets. The differences compared to the oldest r300 chips are: 64 * - Blend LTE/GTE thresholds 65 * - Better MACRO_SWITCH in texture tiling 66 * - Half float vertex 67 * - More HyperZ optimizations */ 68 boolean is_rv350; 69 /* Whether or not this is R400. The differences compared their rv350 70 * cousins are: 71 * - Extended fragment shader registers 72 * - 3DC texture compression (RGTC2) */ 73 boolean is_r400; 74 /* Whether or not this is an RV515 or newer; R500s have many differences 75 * that require extra consideration, compared to their rv350 cousins: 76 * - Extra bit of width and height on texture sizes 77 * - Blend color is split across two registers 78 * - Universal Shader (US) block used for fragment shaders 79 * - FP16 blending and multisampling 80 * - Full RGTC texture compression 81 * - 24-bit depth textures 82 * - Stencil back-face reference value 83 * - Ability to render up to 2^24 - 1 vertices with signed index offset */ 84 boolean is_r500; 85 /* Whether or not the second pixel pipe is accessed with the high bit */ 86 boolean high_second_pipe; 87 /* DXTC texture swizzling. */ 88 boolean dxtc_swizzle; 89 /* Whether R500_US_FORMAT0_0 exists (R520-only and depends on DRM). */ 90 boolean has_us_format; 91 }; 92 93 void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps); 94 95 #endif /* R300_CHIPSET_H */ 96