1 /* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __SOC_ROCKCHIP_RK3399_DFS_H__ 8 #define __SOC_ROCKCHIP_RK3399_DFS_H__ 9 10 struct rk3399_sdram_default_config { 11 unsigned char bl; 12 /* 1:auto precharge, 0:never auto precharge */ 13 unsigned char ap; 14 /* dram driver strength */ 15 unsigned char dramds; 16 /* dram ODT, if odt=0, this parameter invalid */ 17 unsigned char dramodt; 18 /* ca ODT, if odt=0, this parameter invalid 19 * only used by LPDDR4 20 */ 21 unsigned char caodt; 22 unsigned char burst_ref_cnt; 23 /* zqcs period, unit(s) */ 24 unsigned char zqcsi; 25 }; 26 27 struct drv_odt_lp_config { 28 uint32_t pd_idle; 29 uint32_t sr_idle; 30 uint32_t sr_mc_gate_idle; 31 uint32_t srpd_lite_idle; 32 uint32_t standby_idle; 33 uint32_t odt_en; 34 35 uint32_t dram_side_drv; 36 uint32_t dram_side_dq_odt; 37 uint32_t dram_side_ca_odt; 38 }; 39 40 uint32_t ddr_set_rate(uint32_t hz); 41 uint32_t ddr_round_rate(uint32_t hz); 42 uint32_t ddr_get_rate(void); 43 uint32_t dram_set_odt_pd(uint32_t arg0, uint32_t arg1, uint32_t arg2); 44 void dram_dfs_init(void); 45 void ddr_prepare_for_sys_suspend(void); 46 void ddr_prepare_for_sys_resume(void); 47 48 #endif 49