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Searched +full:- +full:- +full:hard (Results 1 – 25 of 1099) sorted by relevance

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/external/clang/test/Driver/
D	mips-mti.cpp	`3 // -EB -mhard-float -mabi=32 4 // RUN: %clang -no-canonical-prefixes %s -### -o %t.o 2>&1 \ 5 // RUN: --target=mips-mti-linux-gnu \ 6 // RUN: --gcc-toolchain=%S/Inputs/mips_mti_tree \ 7 // RUN: -stdlib=libstdc++ \ 8 // RUN: -EB -mhard-float -mabi=32 \ 9 // RUN: \| FileCheck --check-prefix=EB-HARD-O32 %s 10 // EB-HARD-O32: "-internal-isystem" 11 // EB-HARD-O32: "[[TC:[^"]+/lib/gcc/mips-mti-linux-gnu/4.9.2]]/../../../../mips-mti-linux-gnu/inclu… 12 // EB-HARD-O32: "-internal-isystem" [all …]`
D	mips-img-v2.cpp	3 // -EB -mips32r6 -mhard-float -mabi=32 4 // RUN: %clang -no-canonical-prefixes %s -### -o %t.o 2>&1 \ 5 // RUN: --target=mips-img-linux-gnu \ 6 // RUN: --gcc-toolchain=%S/Inputs/mips_img_v2_tree \ 7 // RUN: -stdlib=libstdc++ \ 8 // RUN: -EB -mips32r6 -mhard-float -mabi=32 \ 9 // RUN: \| FileCheck --check-prefix=EB-HARD-O32 %s 10 // EB-HARD-O32: "-internal-isystem" 11 // EB-HARD-O32: "[[TC:[^"]+/lib/gcc/mips-img-linux-gnu/4.9.2]]/../../../../mips-img-linux-gnu/inclu… 12 // EB-HARD-O32: "-internal-isystem" [all …]
D	mips-float.c	`1 // Check handling -mhard-float / -msoft-float / -mfloat-abi options 5 // RUN: %clang -c %s -### -o %t.o 2>&1 \ 6 // RUN: -target mips-linux-gnu \ 7 // RUN: \| FileCheck --check-prefix=CHECK-DEF %s 8 // CHECK-DEF: "-mfloat-abi" "hard" 10 // -mhard-float 11 // RUN: %clang -c %s -### -o %t.o 2>&1 \ 12 // RUN: -target mips-linux-gnu -mhard-float \ 13 // RUN: \| FileCheck --check-prefix=CHECK-HARD %s 14 // CHECK-HARD: "-mfloat-abi" "hard" [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
D	float-cmp.ll	1 ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 \| FileCheck %s -check-prefix=CHECK -ch… 2 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 \| FileCheck %s -check-prefix=CHECK -ch… 3 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 \| FileCheck %s -check-prefix=CHECK -ch… 4 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a8 \| FileCheck %s -check-prefix=CHECK -ch… 9 ; CHECK-LABEL: cmp_f_false: 11 ; HARD: movs r0, #0 16 ; CHECK-LABEL: cmp_f_oeq: 18 ; HARD: vcmp.f32 19 ; HARD: moveq r0, #1 24 ; CHECK-LABEL: cmp_f_ogt: [all …]
D	float-ops.ll	1 ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 \| FileCheck %s -check-prefix=CHECK -ch… 2 …llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 \| FileCheck %s -check-prefix=CHECK -check-pr… 3 … llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 \| FileCheck %s -check-prefix=CHECK -check-p… 4 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-a8 \| FileCheck %s -check-prefix=CHECK -check-prefix=HARD… 8 ; CHECK-LABEL: add_f: 10 ; HARD: vadd.f32 s0, s0, s1 17 ; CHECK-LABEL: add_d: 27 ; CHECK-LABEL: sub_f: 29 ; HARD: vsub.f32 s 36 ; CHECK-LABEL: sub_d: [all …]
D	float-intrinsics-float.ll	1 …RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 \| FileCheck %s -chec… 2 …< %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 \| FileCheck %s -check-prefix=… 3 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 \| FileCheck %s -check-prefix=CHECK… 4 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 -mattr=+fp-only-sp \| FileCheck %s -check-prefix=CHECK… 5 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-a7 \| FileCheck %s -check-prefix=CHECK… 6 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-a57 \| FileCheck %s -check-prefix=CHECK… 10 ; CHECK-LABEL: sqrt_f: 12 ; HARD: vsqrt.f32 s0, s0 19 ; CHECK-LABEL: powi_f: 21 ; HARD: b __powisf2 [all …]
/external/llvm/test/CodeGen/Thumb2/
D	float-cmp.ll	1 ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 \| FileCheck %s -check-prefix=CHECK -ch… 2 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 \| FileCheck %s -check-prefix=CHECK -ch… 3 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 \| FileCheck %s -check-prefix=CHECK -ch… 4 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a8 \| FileCheck %s -check-prefix=CHECK -ch… 9 ; CHECK-LABEL: cmp_f_false: 11 ; HARD: movs r0, #0 16 ; CHECK-LABEL: cmp_f_oeq: 18 ; HARD: vcmpe.f32 19 ; HARD: moveq r0, #1 24 ; CHECK-LABEL: cmp_f_ogt: [all …]
D	float-ops.ll	1 ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 \| FileCheck %s -check-prefix=CHECK -ch… 2 …llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 \| FileCheck %s -check-prefix=CHECK -check-pr… 3 … llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 \| FileCheck %s -check-prefix=CHECK -check-p… 4 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-a8 \| FileCheck %s -check-prefix=CHECK -check-prefix=HARD… 8 ; CHECK-LABEL: add_f: 10 ; HARD: vadd.f32 s0, s0, s1 17 ; CHECK-LABEL: add_d: 27 ; CHECK-LABEL: sub_f: 29 ; HARD: vsub.f32 s 36 ; CHECK-LABEL: sub_d: [all …]
D	float-intrinsics-float.ll	1 …RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 \| FileCheck %s -chec… 2 …< %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 \| FileCheck %s -check-prefix=… 3 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 \| FileCheck %s -check-prefix=CHECK… 4 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 -mattr=+fp-only-sp \| FileCheck %s -check-prefix=CHECK… 5 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-a7 \| FileCheck %s -check-prefix=CHECK… 6 …-mtriple=thumbv7-none-eabihf -mcpu=cortex-a57 \| FileCheck %s -check-prefix=CHECK… 10 ; CHECK-LABEL: sqrt_f: 12 ; HARD: vsqrt.f32 s0, s0 19 ; CHECK-LABEL: powi_f: 21 ; HARD: b __powisf2 [all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
D	big-endian-vector-callee.ll	1 ; RUN: llc -mtriple armeb-eabi -mattr v7,neon -float-abi soft %s -o - \| FileCheck %s -check-prefix … 2 ; RUN: llc -mtriple armeb-eabi -mattr v7,neon -float-abi hard %s -o - \| FileCheck %s -check-prefix … 4 ; CHECK-LABEL: test_i64_f64: 6 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0 8 ; HARD: vadd.f64 d{{[0-9]+}}, d0 17 ; CHECK-LABEL: test_i64_v1i64: 19 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0 21 ; HARD: vadd.i64 d{{[0-9]+}}, d0 30 ; CHECK-LABEL: test_i64_v2f32: 32 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0 [all …]
D	big-endian-vector-caller.ll	`1 ; RUN: llc -mtriple armeb-eabi -mattr v7,neon -float-abi soft %s -o - \| FileCheck %s -check-prefix … 2 ; RUN: llc -mtriple armeb-eabi -mattr v7,neon -float-abi hard %s -o - \| FileCheck %s -check-prefix … 4 ; CHECK-LABEL: test_i64_f64: 7 ; SOFT: vadd.f64 [[REG:d[0-9]+]] 9 ; HARD: vadd.f64 d0 20 ; CHECK-LABEL: test_i64_v1i64: 23 ; SOFT: vadd.i64 [[REG:d[0-9]+]] 25 ; HARD: vadd.i64 d0 36 ; CHECK-LABEL: test_i64_v2f32: 39 ; SOFT: vrev64.32 [[REG:d[0-9]+]] [all …]`
D	fp16-args.ll	1 ; RUN: llc -float-abi soft -mattr=+fp16 < %s \| FileCheck %s --check-prefix=CHECK --check-prefix=SOFT 2 ; RUN: llc -float-abi hard -mattr=+fp16 < %s \| FileCheck %s --check-prefix=CHECK --check-prefix=HARD 4 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 5 target triple = "armv7a--none-eabi" 22 ; SOFT: vmov {{s[0-9]+}}, r1 23 ; SOFT: vmov {{s[0-9]+}}, r0 24 ; SOFT: vcvtb.f32.f16 {{s[0-9]+}}, {{s[0-9]+}} 25 ; SOFT: vcvtb.f32.f16 {{s[0-9]+}}, {{s[0-9]+}} 26 ; SOFT: vadd.f32 {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 27 ; SOFT: vcvtb.f16.f32 {{s[0-9]+}}, {{s[0-9]+}} [all …]
D	fp16-intrinsic-vector-1op.ll	1 ; RUN: llc < %s -mtriple=arm-none-eabi -mattr=+v8.2a,+fullfp16,+neon -float-abi=hard \| FileCheck… 2 … RUN: llc < %s -mtriple=armeb-none-eabi -mattr=+v8.2a,+fullfp16,+neon -float-abi=hard \| FileChe… 3 ; RUN: llc < %s -mtriple=arm-none-eabi -mattr=+v8.2a,+fullfp16,+neon \| FileCheck %s --check-prefix… 4 ; RUN: llc < %s -mtriple=armeb-none-eabi -mattr=+v8.2a,+fullfp16,+neon \| FileCheck %s --check-pref… 9 ; CHECK-LABEL: t_vabsq_f16: 11 ; CHECK-HARD: vabs.f16 q0, q0 12 ; CHECK-HARD-NEXT: bx lr 14 ; CHECK-HARD-BE: vrev64.16 [[Q8:q[0-9]+]], q0 15 ; CHECK-HARD-BE-NEXT: vabs.f16 [[Q8]], [[Q8]] 16 ; CHECK-HARD-BE-NEXT: vrev64.16 q0, [[Q8]] [all …]
/external/llvm/test/CodeGen/ARM/
D	big-endian-vector-callee.ll	1 ; RUN: llc -mtriple armeb-eabi -mattr v7,neon -float-abi soft %s -o - \| FileCheck %s -check-prefix … 2 ; RUN: llc -mtriple armeb-eabi -mattr v7,neon -float-abi hard %s -o - \| FileCheck %s -check-prefix … 4 ; CHECK-LABEL: test_i64_f64: 6 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0 8 ; HARD: vadd.f64 d{{[0-9]+}}, d0 17 ; CHECK-LABEL: test_i64_v1i64: 19 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0 21 ; HARD: vadd.i64 d{{[0-9]+}}, d0 30 ; CHECK-LABEL: test_i64_v2f32: 32 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0 [all …]
D	big-endian-vector-caller.ll	`1 ; RUN: llc -mtriple armeb-eabi -mattr v7,neon -float-abi soft %s -o - \| FileCheck %s -check-prefix … 2 ; RUN: llc -mtriple armeb-eabi -mattr v7,neon -float-abi hard %s -o - \| FileCheck %s -check-prefix … 4 ; CHECK-LABEL: test_i64_f64: 7 ; SOFT: vadd.f64 [[REG:d[0-9]+]] 9 ; HARD: vadd.f64 d0 20 ; CHECK-LABEL: test_i64_v1i64: 23 ; SOFT: vadd.i64 [[REG:d[0-9]+]] 25 ; HARD: vadd.i64 d0 36 ; CHECK-LABEL: test_i64_v2f32: 39 ; SOFT: vrev64.32 [[REG:d[0-9]+]] [all …]`
D	fp16-args.ll	1 ; RUN: llc -float-abi soft -mattr=+fp16 < %s \| FileCheck %s --check-prefix=CHECK --check-prefix=SOFT 2 ; RUN: llc -float-abi hard -mattr=+fp16 < %s \| FileCheck %s --check-prefix=CHECK --check-prefix=HARD 4 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 5 target triple = "armv7a--none-eabi" 22 ; SOFT: vmov {{s[0-9]+}}, r1 23 ; SOFT: vmov {{s[0-9]+}}, r0 24 ; SOFT: vcvtb.f32.f16 {{s[0-9]+}}, {{s[0-9]+}} 25 ; SOFT: vcvtb.f32.f16 {{s[0-9]+}}, {{s[0-9]+}} 26 ; SOFT: vadd.f32 {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 27 ; SOFT: vcvtb.f16.f32 {{s[0-9]+}}, {{s[0-9]+}} [all …]
/external/llvm/test/CodeGen/SPARC/
D	32abi.ll	1 …< %s -march=sparc -disable-sparc-delay-filler -disable-sparc-leaf-proc \| FileCheck %s --check-pref… 2 … %s -march=sparcel -disable-sparc-delay-filler -disable-sparc-leaf-proc \| FileCheck %s --check-pre… 3 …-march=sparc -disable-sparc-delay-filler -disable-sparc-leaf-proc -mattr=soft-float \| FileCheck %s… 5 ; CHECK-LABEL: intarg: 8 ; CHECK: save %sp, -96, %sp 9 ; CHECK: ld [%fp+96], [[R2:%[gilo][0-7]]] 10 ; CHECK: ld [%fp+92], [[R1:%[gilo][0-7]]] 42 ; CHECK-LABEL: call_intarg: 43 ; CHECK: save %sp, -104, %sp 44 ; Use %o0-%o5 for outgoing arguments [all …]
D	fp128.ll	1 ; RUN: llc < %s -march=sparc -mattr=hard-quad-float \| FileCheck %s --check-prefix=CHECK --check-pre… 2 ; RUN: llc < %s -march=sparcel -mattr=hard-quad-float \| FileCheck %s --check-prefix=CHECK --check-p… 3 ; RUN: llc < %s -march=sparc -mattr=-hard-quad-float \| FileCheck %s --check-prefix=CHECK --check-pr… 4 ; RUN: llc < %s -march=sparcel -mattr=-hard-quad-float \| FileCheck %s --check-prefix=CHECK --check-… 7 ; CHECK-LABEL: f128_ops: 12 ; HARD: faddq [[R0:.+]], [[R1:.+]], [[R2:.+]] 13 ; HARD: fsubq [[R2]], [[R3:.+]], [[R4:.+]] 14 ; HARD: fmulq [[R4]], [[R5:.+]], [[R6:.+]] 15 ; HARD: fdivq [[R6]], [[R2]] 37 ; CHECK-LABEL: f128_spill: [all …]
D	64abi.ll	1 … RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc \| FileCheck %s … 2 …: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc -mattr=soft-float \|… 4 ; CHECK-LABEL: intarg: 7 ; CHECK: save %sp, -128, %sp 8 ; CHECK: ldx [%fp+2231], [[R2:%[gilo][0-7]]] 9 ; CHECK: ld [%fp+2227], [[R1:%[gilo][0-7]]] 41 ; CHECK-LABEL: call_intarg: 43 ; CHECK: save %sp, -192, %sp 44 ; Sign-extend and store the full 64 bits. 45 ; CHECK: sra %i0, 0, [[R:%[gilo][0-7]]] [all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SPARC/
D	32abi.ll	1 …< %s -march=sparc -disable-sparc-delay-filler -disable-sparc-leaf-proc \| FileCheck %s --check-pref… 2 … %s -march=sparcel -disable-sparc-delay-filler -disable-sparc-leaf-proc \| FileCheck %s --check-pre… 3 …-march=sparc -disable-sparc-delay-filler -disable-sparc-leaf-proc -mattr=soft-float \| FileCheck %s… 5 ; CHECK-LABEL: intarg: 8 ; CHECK: save %sp, -96, %sp 9 ; CHECK: ld [%fp+96], [[R2:%[gilo][0-7]]] 10 ; CHECK: ld [%fp+92], [[R1:%[gilo][0-7]]] 42 ; CHECK-LABEL: call_intarg: 43 ; CHECK: save %sp, -104, %sp 44 ; Use %o0-%o5 for outgoing arguments [all …]
D	fp128.ll	1 ; RUN: llc < %s -march=sparc -mattr=hard-quad-float \| FileCheck %s --check-prefix=CHECK --check-pre… 2 ; RUN: llc < %s -march=sparcel -mattr=hard-quad-float \| FileCheck %s --check-prefix=CHECK --check-p… 3 ; RUN: llc < %s -march=sparc -mattr=-hard-quad-float \| FileCheck %s --check-prefix=CHECK --check-pr… 4 ; RUN: llc < %s -march=sparcel -mattr=-hard-quad-float \| FileCheck %s --check-prefix=CHECK --check-… 7 ; CHECK-LABEL: f128_ops: 12 ; HARD: faddq [[R0:.+]], [[R1:.+]], [[R2:.+]] 13 ; HARD: fsubq [[R2]], [[R3:.+]], [[R4:.+]] 14 ; HARD: fmulq [[R4]], [[R5:.+]], [[R6:.+]] 15 ; HARD: fdivq [[R6]], [[R2]] 37 ; CHECK-LABEL: f128_spill: [all …]
D	64abi.ll	1 … RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc \| FileCheck %s … 2 …: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc -mattr=soft-float \|… 4 ; CHECK-LABEL: intarg: 7 ; CHECK: save %sp, -128, %sp 8 ; CHECK: ldx [%fp+2231], [[R2:%[gilo][0-7]]] 9 ; CHECK: ld [%fp+2227], [[R1:%[gilo][0-7]]] 41 ; CHECK-LABEL: call_intarg: 43 ; CHECK: save %sp, -192, %sp 44 ; Sign-extend and store the full 64 bits. 45 ; CHECK: sra %i0, 0, [[R:%[gilo][0-7]]] [all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/GlobalISel/
D	arm-isel-fp.ll	1 … RUN: llc -mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -global-isel %s -o - \| FileChe… 2 … llc -mtriple arm-linux-gnueabi -mattr=+vfp2,+soft-float -float-abi=soft -global-isel %s -o - \| Fi… 3 …: llc -mtriple arm-linux-gnu- -mattr=+vfp2,+soft-float -float-abi=soft -global-isel %s -o - \| File… 6 ; CHECK-LABEL: test_frem_float: 13 ; CHECK-LABEL: test_frem_double: 21 ; CHECK-LABEL: test_fpow_float: 29 ; CHECK-LABEL: test_fpow_double: 36 ; CHECK-LABEL: test_add_float: 37 ; HARD: vadd.f32 38 ; SOFT-AEABI: bl __aeabi_fadd [all …]
D	arm-legalize-vfp4.mir	1 …N: llc -mtriple arm-linux-gnueabihf -mattr=+vfp4 -float-abi=hard -run-pass=legalizer %s -o - \| Fil… 2 …-mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -run-pass=legalizer %s -o - \| FileCheck … 3 …-mtriple arm-linux-gnueabi -mattr=+vfp4,+soft-float -float-abi=soft -run-pass=legalizer %s -o - \| … 4 …-mtriple arm-linux-gnu -mattr=+vfp4,+soft-float -float-abi=soft -run-pass=legalizer %s -o - \| File… 5 --- \| 9 --- 11 # CHECK-LABEL: name: test_fma_float 18 - { id: 0, class: _ } 19 - { id: 1, class: _ } 20 - { id: 2, class: _ } [all …]
/external/bcc/man/man8/
D	hardirqs.8	`1 .TH hardirqs 8 "2015-10-20" "USER COMMANDS" 3 hardirqs \- Measure hard IRQ (hard interrupt) event time. Uses Linux eBPF/bcc. 5 .B hardirqs [\-h] [\-T] [\-N] [\-C] [\-d] [interval] [outputs] 7 This summarizes the time spent servicing hard IRQs (hard interrupts), and can 8 show this time as either totals or histogram distributions. A system-wide 12 WARNING: This currently uses dynamic tracing of hard interrupts. You should 21 \-h 24 \-T 27 \-N 30 \-C [all …]`

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