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/external/libaom/libaom/av1/common/
Dquant_common.c22 31, 32, 32, 33, 34, 35, 36, 37, 38, 38, 39, 40, 41, 42,
93 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
177 // over 1024 pixels (>32x32) are scaled up only 2x unity (1 bit).
178 // This descaling is found via av1_tx_get_scale(). Thus, 16x32, 32x16
179 // and 32x32 transforms actually return Q2 coefficients, and 32x64,
283 sub-sampled from the 32x32 and 16x16 sizes, but explicitly
297 32, 43, 73, 97, 43, 67, 94, 110, 73, 94, 137, 150, 97, 110, 150, 200,
299 32, 32, 38, 51, 68, 84, 95, 109, 32, 35, 40, 49, 63, 76, 89, 102, 38,
304 32, 31, 31, 34, 36, 44, 48, 59, 65, 80, 83, 91, 97, 104, 111, 119, 31,
305 32, 32, 33, 34, 41, 44, 54, 59, 72, 75, 83, 90, 97, 104, 112, 31, 32,
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Deliminate-pred-spill.ll8 %0 = bitcast i8* %key to <32 x i32>*
9 %1 = bitcast i8* %data1 to <32 x i32>*
13 %pkey.0542 = phi <32 x i32>* [ %0, %entry ], [ null, %for.body ]
14 %pdata0.0541 = phi <32 x i32>* [ null, %entry ], [ %add.ptr48, %for.body ]
15 %pdata1.0540 = phi <32 x i32>* [ %1, %entry ], [ %add.ptr49, %for.body ]
17 %2 = load <32 x i32>, <32 x i32>* %pkey.0542, align 128
18 %3 = load <32 x i32>, <32 x i32>* %pdata0.0541, align 128
19 %4 = load <32 x i32>, <32 x i32>* undef, align 128
20 %arrayidx4 = getelementptr inbounds <32 x i32>, <32 x i32>* %pdata0.0541, i32 2
21 %5 = load <32 x i32>, <32 x i32>* %arrayidx4, align 128
[all …]
Dv6vect-spill-kill.ll10 %v0 = tail call <32 x i32> @llvm.hexagon.V6.vshuffh.128B(<32 x i32> undef)
16 %v3 = bitcast i8* %a1 to <32 x i32>*
20 %v4 = phi <32 x i32>* [ %v3, %b1 ], [ undef, %b2 ]
21 …%v5 = tail call <32 x i32> @llvm.hexagon.V6.vlalignbi.128B(<32 x i32> undef, <32 x i32> zeroinitia…
22 …%v6 = tail call <32 x i32> @llvm.hexagon.V6.vabsdiffub.128B(<32 x i32> %v5, <32 x i32> zeroinitial…
23 …%v7 = tail call <32 x i32> @llvm.hexagon.V6.vaddbnq.128B(<1024 x i1> zeroinitializer, <32 x i32> z…
24 …%v8 = tail call <32 x i32> @llvm.hexagon.V6.vaddbnq.128B(<1024 x i1> undef, <32 x i32> %v7, <32 x …
25 …%v9 = tail call <32 x i32> @llvm.hexagon.V6.vaddbnq.128B(<1024 x i1> zeroinitializer, <32 x i32> %…
26 …%v10 = tail call <32 x i32> @llvm.hexagon.V6.vaddbnq.128B(<1024 x i1> undef, <32 x i32> %v9, <32 x…
27 …%v11 = tail call <32 x i32> @llvm.hexagon.V6.vlalignbi.128B(<32 x i32> undef, <32 x i32> zeroiniti…
[all …]
Dexpand-vstorerw-undef2.ll12 declare <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32>) #1
13 declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #1
14 declare <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32) #1
15 declare <32 x i32> @llvm.hexagon.V6.vaddh.128B(<32 x i32>, <32 x i32>) #1
16 declare <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32>, <32 x i32>) #1
17 declare <32 x i32> @llvm.hexagon.V6.valignb.128B(<32 x i32>, <32 x i32>, i32) #1
18 declare <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32>, <32 x i32>, i32) #1
19 declare <32 x i32> @llvm.hexagon.V6.vasrwh.128B(<32 x i32>, <32 x i32>, i32) #1
20 declare <32 x i32> @llvm.hexagon.V6.vavghrnd.128B(<32 x i32>, <32 x i32>) #1
21 declare <32 x i32> @llvm.hexagon.V6.vlsrw.128B(<32 x i32>, i32) #1
[all …]
Dv6vect-dbl-spill.ll9 %v0 = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 16843009)
10 %v1 = tail call <32 x i32> @llvm.hexagon.V6.vshuffh.128B(<32 x i32> undef)
11 %v2 = tail call <32 x i32> @llvm.hexagon.V6.vshuffh.128B(<32 x i32> zeroinitializer)
18 %v6 = phi <32 x i32>* [ undef, %b1 ], [ undef, %b0 ]
19 %v7 = tail call <32 x i32> @llvm.hexagon.V6.vabsdiffub.128B(<32 x i32> undef, <32 x i32> undef)
20 …%v8 = tail call <1024 x i1> @llvm.hexagon.V6.vgtub.128B(<32 x i32> %v7, <32 x i32> zeroinitializer)
21 …%v9 = tail call <32 x i32> @llvm.hexagon.V6.vaddbnq.128B(<1024 x i1> %v8, <32 x i32> undef, <32 x …
22 …%v10 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> undef, <32 x i32> undef, i32…
23 …%v11 = tail call <32 x i32> @llvm.hexagon.V6.vabsdiffub.128B(<32 x i32> zeroinitializer, <32 x i32…
24 %v12 = tail call <32 x i32> @llvm.hexagon.V6.vabsdiffub.128B(<32 x i32> %v10, <32 x i32> undef)
[all …]
Dprob-types.ll11 declare <32 x i32> @llvm.hexagon.V6.vdmpybus.128B(<32 x i32>, i32) #0
14 declare <32 x i32> @llvm.hexagon.V6.vlalignbi.128B(<32 x i32>, <32 x i32>, i32) #0
17 declare <32 x i32> @llvm.hexagon.V6.vaddh.128B(<32 x i32>, <32 x i32>) #0
20 declare <32 x i32> @llvm.hexagon.V6.vlalignb.128B(<32 x i32>, <32 x i32>, i32) #0
23 declare <32 x i32> @llvm.hexagon.V6.vand.128B(<32 x i32>, <32 x i32>) #0
26 declare <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32>, <32 x i32>, i32) #0
29 declare <32 x i32> @llvm.hexagon.V6.vrdelta.128B(<32 x i32>, <32 x i32>) #0
32 declare <64 x i32> @llvm.hexagon.V6.vunpackuh.128B(<32 x i32>) #0
35 declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #0
38 declare <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32>) #0
[all …]
Dreg-scav-imp-use-dbl-vec.ll18 declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #1
21 declare <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32>) #1
24 declare <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32) #1
27 declare <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32>, <32 x i32>) #1
30 declare <32 x i32> @llvm.hexagon.V6.vlsrw.128B(<32 x i32>, i32) #1
33 declare <32 x i32> @llvm.hexagon.V6.vshufeh.128B(<32 x i32>, <32 x i32>) #1
39 declare <32 x i32> @llvm.hexagon.V6.vasrh.128B(<32 x i32>, i32) #1
42 declare <64 x i32> @llvm.hexagon.V6.vzh.128B(<32 x i32>) #1
45 declare <32 x i32> @llvm.hexagon.V6.vaddh.128B(<32 x i32>, <32 x i32>) #1
48 declare <64 x i32> @llvm.hexagon.V6.vmpyuh.128B(<32 x i32>, i32) #1
[all …]
Dvec-call-full1.ll11 …32 x i32> %a0, <32 x i32> %a1, <32 x i32> %a2, <32 x i32> %a3, <32 x i32> %a4, <32 x i32> %a5, <32…
13 …32 x i32> %a1, <32 x i32> %a2, <32 x i32> %a3, <32 x i32> %a4, <32 x i32> %a5, <32 x i32> %a6, <32…
17 …32 x i32>, <32 x i32>, <32 x i32>, <32 x i32>, <32 x i32>, <32 x i32>, <32 x i32>, <32 x i32>, <32…
/external/llvm/test/CodeGen/Hexagon/
Deliminate-pred-spill.ll9 %0 = bitcast i8* %key to <32 x i32>*
10 %1 = bitcast i8* %data1 to <32 x i32>*
14 %pkey.0542 = phi <32 x i32>* [ %0, %entry ], [ null, %for.body ]
15 %pdata0.0541 = phi <32 x i32>* [ null, %entry ], [ %add.ptr48, %for.body ]
16 %pdata1.0540 = phi <32 x i32>* [ %1, %entry ], [ %add.ptr49, %for.body ]
18 %2 = load <32 x i32>, <32 x i32>* %pkey.0542, align 128
19 %3 = load <32 x i32>, <32 x i32>* %pdata0.0541, align 128
20 %4 = load <32 x i32>, <32 x i32>* undef, align 128
21 %arrayidx4 = getelementptr inbounds <32 x i32>, <32 x i32>* %pdata0.0541, i32 2
22 %5 = load <32 x i32>, <32 x i32>* %arrayidx4, align 128
[all …]
/external/llvm/test/CodeGen/X86/
Davx512bw-intrinsics.ll3 …wn-linux-gnu -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512F-32
33 ; AVX512F-32-LABEL: test_cmp_b_512:
34 ; AVX512F-32: # BB#0:
35 ; AVX512F-32-NEXT: subl $68, %esp
36 ; AVX512F-32-NEXT: .Ltmp0:
37 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 72
38 ; AVX512F-32-NEXT: vpcmpeqb %zmm1, %zmm0, %k0
39 ; AVX512F-32-NEXT: kmovq %k0, {{[0-9]+}}(%esp)
40 ; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %eax
41 ; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %edx
[all …]
Dabi-isel.ll1 …-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-STATIC
2 …ion-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-PIC
7 …model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-STATIC
8 …amic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
9 …ation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-PIC
17 @xsrc = external global [32 x i32]
18 @xdst = external global [32 x i32]
20 @dsrc = global [131072 x i32] zeroinitializer, align 32
21 @ddst = global [131072 x i32] zeroinitializer, align 32
29 @lxsrc = internal global [32 x i32] zeroinitializer, align 32
[all …]
Davx512bw-arith.ll23 define <32 x i16> @vpaddw512_test(<32 x i16> %i, <32 x i16> %j) nounwind readnone {
24 %x = add <32 x i16> %i, %j
25 ret <32 x i16> %x
31 define <32 x i16> @vpaddw512_fold_test(<32 x i16> %i, <32 x i16>* %j) nounwind {
32 %tmp = load <32 x i16>, <32 x i16>* %j, align 4
33 %x = add <32 x i16> %i, %tmp
34 ret <32 x i16> %x
40 define <32 x i16> @vpaddw512_mask_test(<32 x i16> %i, <32 x i16> %j, <32 x i16> %mask1) nounwind re…
41 %mask = icmp ne <32 x i16> %mask1, zeroinitializer
42 %x = add <32 x i16> %i, %j
[all …]
/external/elfutils/tests/
Drun-allregs.sh32 0: %eax (eax), signed 32 bits
33 1: %ecx (ecx), signed 32 bits
34 2: %edx (edx), signed 32 bits
35 3: %ebx (ebx), signed 32 bits
36 4: %esp (esp), address 32 bits
37 5: %ebp (ebp), address 32 bits
38 6: %esi (esi), signed 32 bits
39 7: %edi (edi), signed 32 bits
40 8: %eip (eip), address 32 bits
41 9: %eflags (eflags), unsigned 32 bits
[all …]
/external/parameter-framework/upstream/test/test-fixed-point-parameter/
DVirtualSubsystem.xml7 <!-- 32b -->
8 <ParameterBlock Name="32">
9 <FixedPointParameter Name="q0.0" Size="32" Integral="0" Fractional="0"/>
10 <FixedPointParameter Name="q0.1" Size="32" Integral="0" Fractional="1"/>
11 <FixedPointParameter Name="q0.2" Size="32" Integral="0" Fractional="2"/>
12 <FixedPointParameter Name="q0.3" Size="32" Integral="0" Fractional="3"/>
13 <FixedPointParameter Name="q0.4" Size="32" Integral="0" Fractional="4"/>
14 <FixedPointParameter Name="q0.5" Size="32" Integral="0" Fractional="5"/>
15 <FixedPointParameter Name="q0.6" Size="32" Integral="0" Fractional="6"/>
16 <FixedPointParameter Name="q0.7" Size="32" Integral="0" Fractional="7"/>
[all …]
/external/llvm/test/CodeGen/Mips/
Dfpneeded.ll1 …h=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-os16 | FileCheck %s -check-prefix=32
13 ; 32: .set nomips16
14 ; 32: .ent fv
15 ; 32: .set noreorder
16 ; 32: .set nomacro
17 ; 32: .set noat
18 ; 32: jr $ra
19 ; 32: .set at
20 ; 32: .set macro
21 ; 32: .set reorder
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dfpneeded.ll1 …h=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-os16 | FileCheck %s -check-prefix=32
13 ; 32: .set nomips16
14 ; 32: .ent fv
15 ; 32: .set noreorder
16 ; 32: .set nomacro
17 ; 32: .set noat
18 ; 32: jr $ra
19 ; 32: .set at
20 ; 32: .set macro
21 ; 32: .set reorder
[all …]
Dselect.ll2 …ux-gnu -mcpu=mips32 -relocation-model=pic -verify-machineinstrs | FileCheck %s -check-prefix=32
3 …-gnu -mcpu=mips32r2 -relocation-model=pic -verify-machineinstrs | FileCheck %s -check-prefix=32R2
4 …-gnu -mcpu=mips32r6 -relocation-model=pic -verify-machineinstrs | FileCheck %s -check-prefix=32R6
13 ; 32-LABEL: i32_icmp_ne_i32_val:
14 ; 32: # %bb.0: # %entry
15 ; 32-NEXT: movn $5, $6, $4
16 ; 32-NEXT: jr $ra
17 ; 32-NEXT: move $2, $5
19 ; 32R2-LABEL: i32_icmp_ne_i32_val:
20 ; 32R2: # %bb.0: # %entry
[all …]
/external/boringssl/src/crypto/cmac/
Dcavp_aes256_cmac_tests.txt8 Klen = 32
17 Klen = 32
26 Klen = 32
35 Klen = 32
44 Klen = 32
53 Klen = 32
62 Klen = 32
71 Klen = 32
80 Klen = 32
89 Klen = 32
[all …]
/external/clang/test/CodeGen/
Dtarget-data.c3 // I686-UNKNOWN: target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
7 // I686-DARWIN: target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
11 // I686-WIN32: target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
15 // I686-CYGWIN: target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
19 // X86_64: target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
23 // XCORE: target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32"
27 // SPARC-V8: target datalayout = "E-m:e-p:32:32-i64:64-f128:64-n32-S64"
34 // RUN: FileCheck %s -check-prefix=MIPS-32EL
35 // MIPS-32EL: target datalayout = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
38 // RUN: FileCheck %s -check-prefix=MIPS-32EB
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dabi-isel.ll1 …-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-STATIC
2 …ion-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-PIC
7 …model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-STATIC
8 …amic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
9 …ation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-PIC
17 @xsrc = external global [32 x i32]
18 @xdst = external global [32 x i32]
20 @dsrc = global [131072 x i32] zeroinitializer, align 32
21 @ddst = global [131072 x i32] zeroinitializer, align 32
29 @lxsrc = internal global [32 x i32] zeroinitializer, align 32
[all …]
Dcmpxchg-clobber-flags.ll2 …iple=i386-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=32-ALL,32-GOOD-RA
3 … -verify-machineinstrs -pre-RA-sched=fast %s -o - | FileCheck %s --check-prefixes=32-ALL,32-FAST-RA
27 ; 32-GOOD-RA-LABEL: test_intervening_call:
28 ; 32-GOOD-RA: # %bb.0: # %entry
29 ; 32-GOOD-RA-NEXT: pushl %ebx
30 ; 32-GOOD-RA-NEXT: pushl %esi
31 ; 32-GOOD-RA-NEXT: pushl %eax
32 ; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %eax
33 ; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %edx
34 ; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %ebx
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dabi-isel.ll1 … -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-STATIC
2 …gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-PIC
7 …-march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-32-STATIC
8 …6 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
9 …arwin -march=x86 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-PIC
17 @xsrc = external global [32 x i32]
18 @xdst = external global [32 x i32]
20 @dsrc = global [131072 x i32] zeroinitializer, align 32
21 @ddst = global [131072 x i32] zeroinitializer, align 32
29 @lxsrc = internal global [32 x i32] zeroinitializer, align 32
[all …]
/external/libxaac/decoder/armv7/
Dixheaacd_esbr_qmfsyn64_winadd.s24 VLD1.32 {D0, D1}, [R0]!
27 VDUP.32 Q15, R7
28 VLD1.32 {D2, D3}, [R2]!
54 VLD1.32 {D4, D5}, [R0], R8
55 VLD1.32 {D6, D7}, [R2], R9
60 VLD1.32 {D8, D9}, [R0], R8
61 VLD1.32 {D10, D11}, [R2], R9
66 VLD1.32 {D12, D13}, [R0], R8
67 VLD1.32 {D14, D15}, [R2], R9
72 VLD1.32 {D16, D17}, [R0], R8
[all …]
/external/boringssl/src/crypto/cipher_extra/test/
Daes_256_cbc_sha256_tls_tests.txt18 TAG_LEN: 32
29 TAG_LEN: 32
41 TAG_LEN: 32
53 TAG_LEN: 32
64 TAG_LEN: 32
75 TAG_LEN: 32
86 TAG_LEN: 32
97 TAG_LEN: 32
108 TAG_LEN: 32
119 TAG_LEN: 32
[all …]
Daes_128_cbc_sha256_tls_tests.txt18 TAG_LEN: 32
29 TAG_LEN: 32
41 TAG_LEN: 32
53 TAG_LEN: 32
64 TAG_LEN: 32
75 TAG_LEN: 32
86 TAG_LEN: 32
97 TAG_LEN: 32
108 TAG_LEN: 32
119 TAG_LEN: 32
[all …]

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