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/external/llvm/test/MC/ARM/
Dtarget-expressions.s3 @ RUN: | FileCheck -check-prefix CHECK-RELOCATIONS %s
70 @ CHECK-RELOCATIONS: Relocations [
71 @ CHECK-RELOCATIONS: 0x4 R_ARM_MOVW_ABS_NC function 0x0
72 @ CHECK-RELOCATIONS: 0x8 R_ARM_MOVT_ABS function 0x0
73 @ CHECK-RELOCATIONS: 0xC R_ARM_MOVW_ABS_NC function 0x0
74 @ CHECK-RELOCATIONS: 0x10 R_ARM_MOVT_ABS function 0x0
75 @ CHECK-RELOCATIONS: 0x34 R_ARM_MOVW_ABS_NC external 0x0
76 @ CHECK-RELOCATIONS: 0x38 R_ARM_MOVT_ABS external 0x0
77 @ CHECK-RELOCATIONS: 0x3C R_ARM_MOVW_ABS_NC external 0x0
78 @ CHECK-RELOCATIONS: 0x40 R_ARM_MOVT_ABS external 0x0
[all …]
Dthumb-movwt-reloc.s3 @ RUN: | FileCheck -check-prefix CHECK-RELOCATIONS %s
23 @ CHECK-RELOCATIONS: Relocations [
24 @ CHECK-RELOCATIONS: 0x2 R_ARM_THM_MOVW_ABS_NC function 0x0
25 @ CHECK-RELOCATIONS: 0x6 R_ARM_THM_MOVT_ABS function 0x0
26 @ CHECK-RELOCATIONS: ]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dtarget-expressions.s3 @ RUN: | FileCheck -check-prefix CHECK-RELOCATIONS %s
70 @ CHECK-RELOCATIONS: Relocations [
71 @ CHECK-RELOCATIONS: 0x4 R_ARM_MOVW_ABS_NC function 0x0
72 @ CHECK-RELOCATIONS: 0x8 R_ARM_MOVT_ABS function 0x0
73 @ CHECK-RELOCATIONS: 0xC R_ARM_MOVW_ABS_NC function 0x0
74 @ CHECK-RELOCATIONS: 0x10 R_ARM_MOVT_ABS function 0x0
75 @ CHECK-RELOCATIONS: 0x34 R_ARM_MOVW_ABS_NC external 0x0
76 @ CHECK-RELOCATIONS: 0x38 R_ARM_MOVT_ABS external 0x0
77 @ CHECK-RELOCATIONS: 0x3C R_ARM_MOVW_ABS_NC external 0x0
78 @ CHECK-RELOCATIONS: 0x40 R_ARM_MOVT_ABS external 0x0
[all …]
Dthumb-movwt-reloc.s3 @ RUN: | FileCheck -check-prefix CHECK-RELOCATIONS %s
23 @ CHECK-RELOCATIONS: Relocations [
24 @ CHECK-RELOCATIONS: 0x2 R_ARM_THM_MOVW_ABS_NC function 0x0
25 @ CHECK-RELOCATIONS: 0x6 R_ARM_THM_MOVT_ABS function 0x0
26 @ CHECK-RELOCATIONS: ]
/external/llvm/test/MC/ARM/Windows/
Dmov32t-range.s2 @ RUN: | llvm-readobj -r - | FileCheck -check-prefix CHECK-RELOCATIONS %s
28 @ CHECK-RELOCATIONS: Relocations [
29 @ CHECK-RELOCATIONS: .text {
30 @ CHECK-RELOCATIONS: 0x0 IMAGE_REL_ARM_MOV32T .rdata
31 @ CHECK-RELOCATIONS-NOT: 0x4 IMAGE_REL_ARM_MOV32T .rdata
32 @ CHECK-RELOCATIONS: }
33 @ CHECK-RELOCATIONS: ]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/Windows/
Dmov32t-range.s2 @ RUN: | llvm-readobj -r - | FileCheck -check-prefix CHECK-RELOCATIONS %s
28 @ CHECK-RELOCATIONS: Relocations [
29 @ CHECK-RELOCATIONS: .text {
30 @ CHECK-RELOCATIONS: 0x0 IMAGE_REL_ARM_MOV32T .rdata
31 @ CHECK-RELOCATIONS-NOT: 0x4 IMAGE_REL_ARM_MOV32T .rdata
32 @ CHECK-RELOCATIONS: }
33 @ CHECK-RELOCATIONS: ]
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DMCJITDesignAndImplementation.rst73 image must be loaded into suitable memory, relocations must be applied and
102 object image and for each section iterates through the relocations for
113 relocations have not yet been applied and the generated code is still not
117 relocations when loadObject completes. However, this shouldn't be
120 relocations are applied. It is possible to apply relocations multiple
148 external symbols and then apply all relocations for the object.
154 iterate through the list of relocations it has stored which are associated
160 sections and for each section iterates through a list of relocations that
163 relocations for which the symbol associated with the relocation is located
168 .. image:: MCJIT-resolve-relocations.png
[all …]
/external/llvm/docs/
DMCJITDesignAndImplementation.rst73 image must be loaded into suitable memory, relocations must be applied and
102 object image and for each section iterates through the relocations for
113 relocations have not yet been applied and the generated code is still not
117 relocations when loadObject completes. However, this shouldn't be
120 relocations are applied. It is possible to apply relocations multiple
148 external symbols and then apply all relocations for the object.
154 iterate through the list of relocations it has stored which are associated
160 sections and for each section iterates through a list of relocations that
163 relocations for which the symbol associated with the relocation is located
168 .. image:: MCJIT-resolve-relocations.png
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-cvtres/
Dmachine.test17 RUN: llvm-readobj -h -relocations %t | FileCheck %s -check-prefix=X86
20 RUN: llvm-readobj -h -relocations %t | FileCheck %s -check-prefix=X64
23 RUN: llvm-readobj -h -relocations %t | FileCheck %s -check-prefix=ARM
26 RUN: llvm-readobj -h -relocations %t | FileCheck %s -check-prefix=ARM64
29 X86-DAG: Relocations [
41 X64-DAG: Relocations [
53 ARM-DAG: Relocations [
65 ARM64-DAG: Relocations [
/external/llvm/test/ExecutionEngine/RuntimeDyld/ARM/
DCOFF_Thumb.s93 .global relocations symbol
94 relocations: label
97 # rtdyld-check: *{4}relocations = function - section_addr(COFF_Thumb.s.tmp.obj, .text)
102 .long relocations(secrel32) @ IMAGE_REL_ARM_SECREL
103 # rtdyld-check: *{4}rel10 = relocations - section_addr(COFF_Thumb.s.tmp.obj, .data)
105 .secrel32 relocations @ IMAGE_REL_ARM_SECREL
106 # rtdyld-check: *{4}rel11 = relocations - section_addr(COFF_Thumb.s.tmp.obj, .data)
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-objcopy/
Dbasic-relocations.test3 # RUN: llvm-readobj -relocations %t2 | FileCheck %s
22 Relocations:
36 Relocations:
44 Relocations:
53 Relocations:
78 # CHECK: Relocations [
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/COFF/
Dsecrel32-undef.s2 # RUN: llvm-readobj -symbols -relocations %t.obj | FileCheck %s
4 # Previously .secrel32 and .secidx relocations against undefined symbols
6 # resolving these relocations against symbols in other object files. Such
7 # relocations can be found in the MSVCRT debug info describing linker-provided
16 # CHECK: Relocations [
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/
DMipsELFObjectWriter.cpp138 /// The relocations that need a matching low part are
205 /// Print all the relocations.
228 report_fatal_error("MIPS does not support one byte relocations"); in getRelocType()
412 /// MIPS has a few relocations that have an AHL component in the expression used
417 /// The O32 ABI for example, uses REL relocations which store the addend in the
418 /// section data. All the relocations with AHL components affect 16-bit fields
420 /// resolves the limitation by linking relocations (e.g. R_MIPS_HI16 and
421 /// R_MIPS_LO16) and distributing the addend between the linked relocations. The
422 /// ABI mandates that such relocations must be next to each other in a
429 /// - There may be multiple high parts relocations for one low part relocation.
[all …]
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DELFCodeEmitter.h31 /// Relocations - Record relocations needed by the current function
32 std::vector<MachineRelocation> Relocations; variable
34 /// JTRelocations - Record relocations needed by the relocation
43 /// addRelocation - Register new relocations for this function
45 Relocations.push_back(MR); in addRelocation()
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-readobj/Inputs/
Delf-packed-relocs1.s2 .sleb128 8 // Number of relocations
5 .sleb128 2 // Number of relocations in group
12 .sleb128 2 // Number of relocations in group
19 .sleb128 2 // Number of relocations in group
30 .sleb128 2 // Number of relocations in group
/external/swiftshader/third_party/llvm-7.0/llvm/test/ExecutionEngine/RuntimeDyld/ARM/
DCOFF_Thumb.s93 .global relocations symbol
94 relocations: label
97 # rtdyld-check: *{4}relocations = function - section_addr(COFF_Thumb.s.tmp.obj, .text)
102 .long relocations(secrel32) @ IMAGE_REL_ARM_SECREL
103 # rtdyld-check: *{4}rel10 = relocations - section_addr(COFF_Thumb.s.tmp.obj, .data)
105 .secrel32 relocations @ IMAGE_REL_ARM_SECREL
106 # rtdyld-check: *{4}rel11 = relocations - section_addr(COFF_Thumb.s.tmp.obj, .data)
/external/swiftshader/third_party/llvm-7.0/llvm/test/Object/
Ddyn-rel-relocation.test1 // Check that 'llvm-readobj -dyn-relocations' shows dynamic relocations
26 RUN: llvm-readobj -relocations -dyn-relocations -expand-relocs \
29 // CHECK: Relocations [
52 // CHECK: Dynamic Relocations {
Drelocation-executable.test3 RUN: llvm-readobj -dyn-relocations -expand-relocs \
6 // CHECK: Relocations [
30 // DYN: Dynamic Relocations {
51 RUN: llvm-readobj -dyn-relocations -expand-relocs \
54 // DYN2: Dynamic Relocations {
/external/llvm/test/Object/
Ddyn-rel-relocation.test1 // Check that 'llvm-readobj -dyn-relocations' shows dynamic relocations
26 RUN: llvm-readobj -relocations -dyn-relocations -expand-relocs \
29 // CHECK: Relocations [
52 // CHECK: Dynamic Relocations {
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsELFObjectWriter.cpp131 /// The relocations that need a matching low part are
197 /// Print all the relocations.
376 /// MIPS has a few relocations that have an AHL component in the expression used
381 /// The O32 ABI for example, uses REL relocations which store the addend in the
382 /// section data. All the relocations with AHL components affect 16-bit fields
384 /// resolves the limitation by linking relocations (e.g. R_MIPS_HI16 and
385 /// R_MIPS_LO16) and distributing the addend between the linked relocations. The
386 /// ABI mandates that such relocations must be next to each other in a
393 /// - There may be multiple high parts relocations for one low part relocation.
394 /// - There may be multiple low part relocations for one high part relocation.
[all …]
/external/llvm/test/MC/Mips/
Doddspreg.s5 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
12 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
21 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
25 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
29 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
33 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
52 # CHECK-OBJ-ALL: Relocations [
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Doddspreg.s5 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
12 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
21 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
25 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
29 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
33 # RUN: llvm-readobj -sections -section-data -section-relocations - | \
52 # CHECK-OBJ-ALL: Relocations [
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MachObjectWriter.cpp104 "ADR/ADRP relocations must be GOT relative"); in getAArch64FixupKindMachOInfo()
127 // Debug info sections can use local relocations. in canUseLocalRelocation()
131 // Otherwise, only pointer sized relocations are supported. in canUseLocalRelocation()
146 // FIXME: ld64 currently handles internal pointer-sized relocations in canUseLocalRelocation()
173 // ADRP fixups use relocations for the whole symbol value and only in recordRelocation()
179 // imm19 relocations are for conditional branches, which require in recordRelocation()
191 // 14-bit branch relocations should only target internal labels, and so in recordRelocation()
250 // We don't support PCrel relocations of differences. in recordRelocation()
258 // AArch64 always uses external relocations. If there is no symbol to use as in recordRelocation()
328 // Relocations inside debug sections always use local relocations when in recordRelocation()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-readobj/
Delf-relr-relocs.test5 # RUN: | llvm-readobj -elf-output-style=LLVM -relocations -raw-relr - \
16 # RUN: | llvm-readobj -elf-output-style=LLVM -relocations - \
43 # RUN: | llvm-readobj -elf-output-style=GNU -relocations -raw-relr - \
53 # RUN: | llvm-readobj -elf-output-style=GNU -relocations - \
97 # RUN: | llvm-readobj -elf-output-style=LLVM -relocations -raw-relr - \
108 # RUN: | llvm-readobj -elf-output-style=LLVM -relocations - \
128 # RUN: | llvm-readobj -elf-output-style=GNU -relocations -raw-relr - \
138 # RUN: | llvm-readobj -elf-output-style=GNU -relocations - \
/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MachObjectWriter.cpp95 "ADR/ADRP relocations must be GOT relative"); in getAArch64FixupKindMachOInfo()
119 // Debug info sections can use local relocations. in canUseLocalRelocation()
123 // Otherwise, only pointer sized relocations are supported. in canUseLocalRelocation()
138 // FIXME: ld64 currently handles internal pointer-sized relocations in canUseLocalRelocation()
165 // ADRP fixups use relocations for the whole symbol value and only in recordRelocation()
171 // imm19 relocations are for conditional branches, which require in recordRelocation()
183 // 14-bit branch relocations should only target internal labels, and so in recordRelocation()
242 // We don't support PCrel relocations of differences. in recordRelocation()
250 // AArch64 always uses external relocations. If there is no symbol to use as in recordRelocation()
335 // Relocations inside debug sections always use local relocations when in recordRelocation()
[all …]

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