Home
last modified time | relevance | path

Searched full:v1 (Results 1 – 25 of 6108) sorted by relevance

12345678910>>...245

/external/tensorflow/tensorflow/tools/compatibility/
Drenames_v2.py29 'tf.compat.v1.AUTO_REUSE',
31 'tf.compat.v1.AttrValue',
37 'tf.compat.v1.ConditionalAccumulator',
39 'tf.compat.v1.ConditionalAccumulatorBase',
41 'tf.compat.v1.ConfigProto',
43 'tf.compat.v1.DeviceSpec',
45 'tf.compat.v1.Dimension',
47 'tf.compat.v1.Event',
55 'tf.compat.v1.FixedLengthRecordReader',
59 'tf.compat.v1.GPUOptions',
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dvop3-convert.s11 v_mov_b32 [v1], [v2]
12 // GCN: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
20 v_mov_b32 v1, ttmp8
21 // SICI: v_mov_b32_e32 v1, ttmp8 ; encoding: [0x78,0x02,0x02,0x7e]
22 // VI: v_mov_b32_e32 v1, ttmp8 ; encoding: [0x78,0x02,0x02,0x7e]
24 // GCN: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
25 v_mov_b32 v1, v2
27 // SICI: v_not_b32_e32 v1, v2 ; encoding: [0x02,0x6f,0x02,0x7e]
28 // VI: v_not_b32_e32 v1, v2 ; encoding: [0x02,0x57,0x02,0x7e]
29 v_not_b32 v1, v2
[all …]
Ddl-insts-err.s10 v_fmac_f32 v0, v1, v2
12 v_xnor_b32 v0, v1, v2
14 v_dot2_f32_f16 v0, v1, v2, v3
16 v_dot2_i32_i16 v0, v1, v2, v3
18 v_dot2_u32_u16 v0, v1, v2, v3
20 v_dot4_i32_i8 v0, v1, v2, v3
22 v_dot4_u32_u8 v0, v1, v2, v3
24 v_dot8_i32_i4 v0, v1, v2, v3
26 v_dot8_u32_u4 v0, v1, v2, v3
33 v_dot2_f32_f16 v0, v1, v2, v3 op_sel
[all …]
Dliteral16.s3 v_add_f16 v1, 0, v2
4 // VI: v_add_f16_e32 v1, 0, v2 ; encoding: [0x80,0x04,0x02,0x3e]
6 v_add_f16 v1, 0.0, v2
7 // VI: v_add_f16_e32 v1, 0, v2 ; encoding: [0x80,0x04,0x02,0x3e]
9 v_add_f16 v1, v2, 0
10 // VI: v_add_f16_e64 v1, v2, 0 ; encoding: [0x01,0x00,0x1f,0xd1,0x02,0x01,0x01,0x00]
12 v_add_f16 v1, v2, 0.0
13 // VI: v_add_f16_e64 v1, v2, 0 ; encoding: [0x01,0x00,0x1f,0xd1,0x02,0x01,0x01,0x00]
15 v_add_f16 v1, -0.0, v2
16 // VI: v_add_f16_e32 v1, 0x8000, v2 ; encoding: [0xff,0x04,0x02,0x3e,0x00,0x80,0x00,0x00]
[all …]
Dvop1.s13 // GCN: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
14 v_mov_b32_e32 v1, v2
34 // GCN: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
35 v_mov_b32_e32 v1, v2
40 // GCN: v_cvt_i32_f64_e32 v1, v[2:3] ; encoding: [0x02,0x07,0x02,0x7e]
41 v_cvt_i32_f64_e32 v1, v[2:3]
46 // GCN: v_cvt_f32_i32_e32 v1, v2 ; encoding: [0x02,0x0b,0x02,0x7e]
47 v_cvt_f32_i32_e32 v1, v2
49 // GCN: v_cvt_f32_u32_e32 v1, v2 ; encoding: [0x02,0x0d,0x02,0x7e]
50 v_cvt_f32_u32_e32 v1, v2
[all …]
Dvop2.s18 // SICI: v_add_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x06]
19 v_add_f32_e32 v1, v2, v3
22 // SICI: v_add_f32_e32 v1, 1.0, v3 ; encoding: [0xf2,0x06,0x02,0x06]
23 v_add_f32 v1, 1.0, v3
26 // SICI: v_add_f32_e32 v1, -1.0, v3 ; encoding: [0xf3,0x06,0x02,0x06]
27 v_add_f32 v1, -1.0, v3
30 // SICI: v_add_f32_e32 v1, 0x42c80000, v3 ; encoding: [0xff,0x06,0x02,0x06,0x00,0x00,0xc8,0x42]
31 v_add_f32 v1, 100.0, v3
34 // SICI: v_add_f32_e32 v1, 0xc2c80000, v3 ; encoding: [0xff,0x06,0x02,0x06,0x00,0x00,0xc8,0xc2]
35 v_add_f32 v1, -100.0, v3
[all …]
Dliteralv216.s3 v_pk_add_f16 v1, 0, v2
4 // GFX9: v_pk_add_f16 v1, 0, v2 ; encoding: [0x01,0x00,0x8f,0xd3,0x80,0x04,0x02,0x18]
6 v_pk_add_f16 v1, 0.0, v2
7 // GFX9: v_pk_add_f16 v1, 0, v2 ; encoding: [0x01,0x00,0x8f,0xd3,0x80,0x04,0x02,0x18]
9 v_pk_add_f16 v1, v2, 0
10 // GFX9: v_pk_add_f16 v1, v2, 0 ; encoding: [0x01,0x00,0x8f,0xd3,0x02,0x01,0x01,0x18]
12 v_pk_add_f16 v1, v2, 0.0
13 // GFX9: v_pk_add_f16 v1, v2, 0 ; encoding: [0x01,0x00,0x8f,0xd3,0x02,0x01,0x01,0x18]
15 v_pk_add_f16 v1, 1.0, v2
16 // GFX9: v_pk_add_f16 v1, 1.0, v2 ; encoding: [0x01,0x00,0x8f,0xd3,0xf2,0x04,0x02,0x18]
[all …]
/external/grpc-grpc/tools/interop_matrix/
Dclient_matrix.py61 'v1.0.1': None
64 'v1.1.4': None
67 'v1.2.5': None
70 'v1.3.9': None
73 'v1.4.2': None
76 'v1.6.6': None
79 'v1.7.2': None
82 'v1.8.0': None
85 'v1.9.1': None
88 'v1.10.1': None
[all …]
/external/smali/smali-integration-tests/src/test/smali/junit-tests/InstructionTests/Format23x/
DFormat23x.smali17 const v1, 234.5f
19 cmpl-float v0, v0, v1
21 const v1, -1
23 invoke-static {v0, v1}, LAssert;->assertEquals(II)V
33 const v1, 234.5f
35 cmpl-float v0, v0, v1
37 const v1, -1
39 invoke-static {v0, v1}, LAssert;->assertEquals(II)V
49 const v1, 234.5f
51 cmpg-float v0, v0, v1
[all …]
/external/llvm/test/MC/AMDGPU/
Dvop2.s18 // SICI: v_add_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x06]
19 v_add_f32_e32 v1, v2, v3
22 // SICI: v_add_f32_e32 v1, 1.0, v3 ; encoding: [0xf2,0x06,0x02,0x06]
23 v_add_f32 v1, 1.0, v3
26 // SICI: v_add_f32_e32 v1, -1.0, v3 ; encoding: [0xf3,0x06,0x02,0x06]
27 v_add_f32 v1, -1.0, v3
30 // SICI: v_add_f32_e32 v1, 0x42c80000, v3 ; encoding: [0xff,0x06,0x02,0x06,0x00,0x00,0xc8,0x42]
31 v_add_f32 v1, 100.0, v3
34 // SICI: v_add_f32_e32 v1, 0xc2c80000, v3 ; encoding: [0xff,0x06,0x02,0x06,0x00,0x00,0xc8,0xc2]
35 v_add_f32 v1, -100.0, v3
[all …]
Dvop1.s13 // GCN: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
14 v_mov_b32_e32 v1, v2
34 // GCN: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
35 v_mov_b32 v1, v2
40 // GCN: v_cvt_i32_f64_e32 v1, v[2:3] ; encoding: [0x02,0x07,0x02,0x7e]
41 v_cvt_i32_f64 v1, v[2:3]
46 // GCN: v_cvt_f32_i32_e32 v1, v2 ; encoding: [0x02,0x0b,0x02,0x7e]
47 v_cvt_f32_i32 v1, v2
49 // GCN: v_cvt_f32_u32_e32 v1, v2 ; encoding: [0x02,0x0d,0x02,0x7e]
50 v_cvt_f32_u32 v1, v2
[all …]
/external/llvm/test/MC/AArch64/
Dneon-across.s9 saddlv h0, v1.8b
10 saddlv h0, v1.16b
11 saddlv s0, v1.4h
12 saddlv s0, v1.8h
13 saddlv d0, v1.4s
15 // CHECK: saddlv h0, v1.8b // encoding: [0x20,0x38,0x30,0x0e]
16 // CHECK: saddlv h0, v1.16b // encoding: [0x20,0x38,0x30,0x4e]
17 // CHECK: saddlv s0, v1.4h // encoding: [0x20,0x38,0x70,0x0e]
18 // CHECK: saddlv s0, v1.8h // encoding: [0x20,0x38,0x70,0x4e]
19 // CHECK: saddlv d0, v1.4s // encoding: [0x20,0x38,0xb0,0x4e]
[all …]
Dneon-2velem.s9 mla v0.2s, v1.2s, v2.s[2]
10 mla v0.2s, v1.2s, v22.s[2]
14 // CHECK: mla v0.2s, v1.2s, v2.s[2] // encoding: [0x20,0x08,0x82,0x2f]
15 // CHECK: mla v0.2s, v1.2s, v22.s[2] // encoding: [0x20,0x08,0x96,0x2f]
19 mla v0.4h, v1.4h, v2.h[2]
20 mla v0.4h, v1.4h, v15.h[2]
21 mla v0.8h, v1.8h, v2.h[7]
22 mla v0.8h, v1.8h, v14.h[6]
24 // CHECK: mla v0.4h, v1.4h, v2.h[2] // encoding: [0x20,0x00,0x62,0x2f]
25 // CHECK: mla v0.4h, v1.4h, v15.h[2] // encoding: [0x20,0x00,0x6f,0x2f]
[all …]
Dneon-3vdiff.s17 saddl v0.8h, v1.8b, v2.8b
18 saddl v0.4s, v1.4h, v2.4h
19 saddl v0.2d, v1.2s, v2.2s
21 // CHECK: saddl v0.8h, v1.8b, v2.8b // encoding: [0x20,0x00,0x22,0x0e]
22 // CHECK: saddl v0.4s, v1.4h, v2.4h // encoding: [0x20,0x00,0x62,0x0e]
23 // CHECK: saddl v0.2d, v1.2s, v2.2s // encoding: [0x20,0x00,0xa2,0x0e]
25 saddl2 v0.4s, v1.8h, v2.8h
26 saddl2 v0.8h, v1.16b, v2.16b
27 saddl2 v0.2d, v1.4s, v2.4s
29 // CHECK: saddl2 v0.4s, v1.8h, v2.8h // encoding: [0x20,0x00,0x62,0x4e]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-across.s9 saddlv h0, v1.8b
10 saddlv h0, v1.16b
11 saddlv s0, v1.4h
12 saddlv s0, v1.8h
13 saddlv d0, v1.4s
15 // CHECK: saddlv h0, v1.8b // encoding: [0x20,0x38,0x30,0x0e]
16 // CHECK: saddlv h0, v1.16b // encoding: [0x20,0x38,0x30,0x4e]
17 // CHECK: saddlv s0, v1.4h // encoding: [0x20,0x38,0x70,0x0e]
18 // CHECK: saddlv s0, v1.8h // encoding: [0x20,0x38,0x70,0x4e]
19 // CHECK: saddlv d0, v1.4s // encoding: [0x20,0x38,0xb0,0x4e]
[all …]
Dneon-2velem.s9 mla v0.2s, v1.2s, v2.s[2]
10 mla v0.2s, v1.2s, v22.s[2]
14 // CHECK: mla v0.2s, v1.2s, v2.s[2] // encoding: [0x20,0x08,0x82,0x2f]
15 // CHECK: mla v0.2s, v1.2s, v22.s[2] // encoding: [0x20,0x08,0x96,0x2f]
19 mla v0.4h, v1.4h, v2.h[2]
20 mla v0.4h, v1.4h, v15.h[2]
21 mla v0.8h, v1.8h, v2.h[7]
22 mla v0.8h, v1.8h, v14.h[6]
24 // CHECK: mla v0.4h, v1.4h, v2.h[2] // encoding: [0x20,0x00,0x62,0x2f]
25 // CHECK: mla v0.4h, v1.4h, v15.h[2] // encoding: [0x20,0x00,0x6f,0x2f]
[all …]
Dneon-3vdiff.s17 saddl v0.8h, v1.8b, v2.8b
18 saddl v0.4s, v1.4h, v2.4h
19 saddl v0.2d, v1.2s, v2.2s
21 // CHECK: saddl v0.8h, v1.8b, v2.8b // encoding: [0x20,0x00,0x22,0x0e]
22 // CHECK: saddl v0.4s, v1.4h, v2.4h // encoding: [0x20,0x00,0x62,0x0e]
23 // CHECK: saddl v0.2d, v1.2s, v2.2s // encoding: [0x20,0x00,0xa2,0x0e]
25 saddl2 v0.4s, v1.8h, v2.8h
26 saddl2 v0.8h, v1.16b, v2.16b
27 saddl2 v0.2d, v1.4s, v2.4s
29 // CHECK: saddl2 v0.4s, v1.8h, v2.8h // encoding: [0x20,0x00,0x62,0x4e]
[all …]
/external/capstone/suite/MC/AArch64/
Dneon-simd-shift.s.cs2 0x20,0x04,0x0d,0x0f = sshr v0.8b, v1.8b, #3
3 0x20,0x04,0x1d,0x0f = sshr v0.4h, v1.4h, #3
4 0x20,0x04,0x3d,0x0f = sshr v0.2s, v1.2s, #3
5 0x20,0x04,0x0d,0x4f = sshr v0.16b, v1.16b, #3
6 0x20,0x04,0x1d,0x4f = sshr v0.8h, v1.8h, #3
7 0x20,0x04,0x3d,0x4f = sshr v0.4s, v1.4s, #3
8 0x20,0x04,0x7d,0x4f = sshr v0.2d, v1.2d, #3
9 0x20,0x04,0x0d,0x2f = ushr v0.8b, v1.8b, #3
10 0x20,0x04,0x1d,0x2f = ushr v0.4h, v1.4h, #3
11 0x20,0x04,0x3d,0x2f = ushr v0.2s, v1.2s, #3
[all …]
Dneon-3vdiff.s.cs2 0x20,0x00,0x22,0x0e = saddl v0.8h, v1.8b, v2.8b
3 0x20,0x00,0x62,0x0e = saddl v0.4s, v1.4h, v2.4h
4 0x20,0x00,0xa2,0x0e = saddl v0.2d, v1.2s, v2.2s
5 0x20,0x00,0x62,0x4e = saddl2 v0.4s, v1.8h, v2.8h
6 0x20,0x00,0x22,0x4e = saddl2 v0.8h, v1.16b, v2.16b
7 0x20,0x00,0xa2,0x4e = saddl2 v0.2d, v1.4s, v2.4s
8 0x20,0x00,0x22,0x2e = uaddl v0.8h, v1.8b, v2.8b
9 0x20,0x00,0x62,0x2e = uaddl v0.4s, v1.4h, v2.4h
10 0x20,0x00,0xa2,0x2e = uaddl v0.2d, v1.2s, v2.2s
11 0x20,0x00,0x22,0x6e = uaddl2 v0.8h, v1.16b, v2.16b
[all …]
Dneon-2velem.s.cs2 0x20,0x08,0x82,0x2f = mla v0.2s, v1.2s, v2.s[2]
3 0x20,0x08,0x96,0x2f = mla v0.2s, v1.2s, v22.s[2]
6 0x20,0x00,0x62,0x2f = mla v0.4h, v1.4h, v2.h[2]
7 0x20,0x00,0x6f,0x2f = mla v0.4h, v1.4h, v15.h[2]
8 0x20,0x08,0x72,0x6f = mla v0.8h, v1.8h, v2.h[7]
9 0x20,0x08,0x6e,0x6f = mla v0.8h, v1.8h, v14.h[6]
10 0x20,0x48,0x82,0x2f = mls v0.2s, v1.2s, v2.s[2]
11 0x20,0x48,0x96,0x2f = mls v0.2s, v1.2s, v22.s[2]
14 0x20,0x40,0x62,0x2f = mls v0.4h, v1.4h, v2.h[2]
15 0x20,0x40,0x6f,0x2f = mls v0.4h, v1.4h, v15.h[2]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/autohvx/
Dvector-compare-128b.ll6 ; CHECK: q[[Q000:[0-3]]] = vcmp.eq(v0.b,v1.b)
7 ; CHECK: v0 = vmux(q[[Q000]],v0,v1)
8 define <128 x i8> @test_00(<128 x i8> %v0, <128 x i8> %v1) #0 {
9 %t0 = icmp eq <128 x i8> %v0, %v1
10 %t1 = select <128 x i1> %t0, <128 x i8> %v0, <128 x i8> %v1
15 ; CHECK: q[[Q010:[0-3]]] = vcmp.eq(v0.b,v1.b)
16 ; CHECK: v0 = vmux(q[[Q010]],v1,v0)
17 define <128 x i8> @test_01(<128 x i8> %v0, <128 x i8> %v1) #0 {
18 %t0 = icmp ne <128 x i8> %v0, %v1
19 %t1 = select <128 x i1> %t0, <128 x i8> %v0, <128 x i8> %v1
[all …]
Dvector-compare-64b.ll6 ; CHECK: q[[Q000:[0-3]]] = vcmp.eq(v0.b,v1.b)
7 ; CHECK: v0 = vmux(q[[Q000]],v0,v1)
8 define <64 x i8> @test_00(<64 x i8> %v0, <64 x i8> %v1) #0 {
9 %t0 = icmp eq <64 x i8> %v0, %v1
10 %t1 = select <64 x i1> %t0, <64 x i8> %v0, <64 x i8> %v1
15 ; CHECK: q[[Q010:[0-3]]] = vcmp.eq(v0.b,v1.b)
16 ; CHECK: v0 = vmux(q[[Q010]],v1,v0)
17 define <64 x i8> @test_01(<64 x i8> %v0, <64 x i8> %v1) #0 {
18 %t0 = icmp ne <64 x i8> %v0, %v1
19 %t1 = select <64 x i1> %t0, <64 x i8> %v0, <64 x i8> %v1
[all …]
Darith.ll6 ; CHECK: vand(v0,v1)
7 define <64 x i8> @andb_64(<64 x i8> %v0, <64 x i8> %v1) #0 {
8 %p = and <64 x i8> %v0, %v1
13 ; CHECK: vand(v0,v1)
14 define <128 x i8> @andb_128(<128 x i8> %v0, <128 x i8> %v1) #1 {
15 %p = and <128 x i8> %v0, %v1
20 ; CHECK: vand(v0,v1)
21 define <32 x i16> @andh_64(<32 x i16> %v0, <32 x i16> %v1) #0 {
22 %p = and <32 x i16> %v0, %v1
27 ; CHECK: vand(v0,v1)
[all …]
/external/vixl/test/aarch64/
Dtest-cpu-features-aarch64.cc730 TEST_NEON(abs_0, abs(v0.V8B(), v1.V8B()))
731 TEST_NEON(abs_1, abs(v0.V16B(), v1.V16B()))
732 TEST_NEON(abs_2, abs(v0.V4H(), v1.V4H()))
733 TEST_NEON(abs_3, abs(v0.V8H(), v1.V8H()))
734 TEST_NEON(abs_4, abs(v0.V2S(), v1.V2S()))
735 TEST_NEON(abs_5, abs(v0.V4S(), v1.V4S()))
736 TEST_NEON(abs_6, abs(v0.V2D(), v1.V2D()))
738 TEST_NEON(addhn_0, addhn(v0.V8B(), v1.V8H(), v2.V8H()))
739 TEST_NEON(addhn_1, addhn(v0.V4H(), v1.V4S(), v2.V4S()))
740 TEST_NEON(addhn_2, addhn(v0.V2S(), v1.V2D(), v2.V2D()))
[all …]
/external/smali/smali-integration-tests/src/test/smali/junit-tests/InstructionTests/Format12x/
DFormat12x.smali17 move v1, v0
19 invoke-static {v0, v1}, LAssert;->assertEquals(II)V
33 invoke-static {v0, v1, v2, v3}, Lorg/junit/Assert;->assertEquals(JJ)V
45 move-object v1, v0
47 invoke-static {v0, v1}, Lorg/junit/Assert;->assertEquals(Ljava/lang/Object;Ljava/lang/Object;)V
58 new-array v1, v0, [I
60 array-length v2, v1
73 neg-int v1, v0
76 invoke-static {v1, v2}, LAssert;->assertEquals(II)V
86 not-int v1, v0
[all …]

12345678910>>...245