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1##
2## Copyright (c) 2015 The WebM project authors. All Rights Reserved.
3##
4##  Use of this source code is governed by a BSD-style license
5##  that can be found in the LICENSE file in the root of the source
6##  tree. An additional intellectual property rights grant can be found
7##  in the file PATENTS.  All contributing project authors may
8##  be found in the AUTHORS file in the root of the source tree.
9##
10
11DSP_SRCS-yes += vpx_dsp.mk
12DSP_SRCS-yes += vpx_dsp_common.h
13
14DSP_SRCS-$(HAVE_MSA)    += mips/macros_msa.h
15
16DSP_SRCS-$(HAVE_AVX2)   += x86/bitdepth_conversion_avx2.h
17DSP_SRCS-$(HAVE_SSE2)   += x86/bitdepth_conversion_sse2.h
18# This file is included in libs.mk. Including it here would cause it to be
19# compiled into an object. Even as an empty file, this would create an
20# executable section on the stack.
21#DSP_SRCS-$(HAVE_SSE2)   += x86/bitdepth_conversion_sse2$(ASM)
22
23# bit reader
24DSP_SRCS-yes += prob.h
25DSP_SRCS-yes += prob.c
26
27ifeq ($(CONFIG_ENCODERS),yes)
28DSP_SRCS-yes += bitwriter.h
29DSP_SRCS-yes += bitwriter.c
30DSP_SRCS-yes += bitwriter_buffer.c
31DSP_SRCS-yes += bitwriter_buffer.h
32DSP_SRCS-yes += psnr.c
33DSP_SRCS-yes += psnr.h
34DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.c
35DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.h
36DSP_SRCS-$(CONFIG_INTERNAL_STATS) += psnrhvs.c
37DSP_SRCS-$(CONFIG_INTERNAL_STATS) += fastssim.c
38endif
39
40ifeq ($(CONFIG_DECODERS),yes)
41DSP_SRCS-yes += bitreader.h
42DSP_SRCS-yes += bitreader.c
43DSP_SRCS-yes += bitreader_buffer.c
44DSP_SRCS-yes += bitreader_buffer.h
45endif
46
47# intra predictions
48DSP_SRCS-yes += intrapred.c
49
50DSP_SRCS-$(HAVE_SSE) += x86/intrapred_sse2.asm
51DSP_SRCS-$(HAVE_SSE2) += x86/intrapred_sse2.asm
52DSP_SRCS-$(HAVE_SSSE3) += x86/intrapred_ssse3.asm
53DSP_SRCS-$(HAVE_VSX) += ppc/intrapred_vsx.c
54
55ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
56DSP_SRCS-$(HAVE_SSE)  += x86/highbd_intrapred_sse2.asm
57DSP_SRCS-$(HAVE_SSE2) += x86/highbd_intrapred_sse2.asm
58DSP_SRCS-$(HAVE_SSE2) += x86/highbd_intrapred_intrin_sse2.c
59DSP_SRCS-$(HAVE_SSSE3) += x86/highbd_intrapred_intrin_ssse3.c
60DSP_SRCS-$(HAVE_NEON) += arm/highbd_intrapred_neon.c
61endif  # CONFIG_VP9_HIGHBITDEPTH
62
63ifneq ($(filter yes,$(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),)
64DSP_SRCS-yes += add_noise.c
65DSP_SRCS-yes += deblock.c
66DSP_SRCS-yes += postproc.h
67DSP_SRCS-$(HAVE_MSA) += mips/add_noise_msa.c
68DSP_SRCS-$(HAVE_MSA) += mips/deblock_msa.c
69DSP_SRCS-$(HAVE_NEON) += arm/deblock_neon.c
70DSP_SRCS-$(HAVE_SSE2) += x86/add_noise_sse2.asm
71DSP_SRCS-$(HAVE_SSE2) += x86/deblock_sse2.asm
72DSP_SRCS-$(HAVE_SSE2) += x86/post_proc_sse2.c
73DSP_SRCS-$(HAVE_VSX) += ppc/deblock_vsx.c
74endif # CONFIG_POSTPROC
75
76DSP_SRCS-$(HAVE_NEON_ASM) += arm/intrapred_neon_asm$(ASM)
77DSP_SRCS-$(HAVE_NEON) += arm/intrapred_neon.c
78DSP_SRCS-$(HAVE_MSA) += mips/intrapred_msa.c
79DSP_SRCS-$(HAVE_DSPR2)  += mips/intrapred4_dspr2.c
80DSP_SRCS-$(HAVE_DSPR2)  += mips/intrapred8_dspr2.c
81DSP_SRCS-$(HAVE_DSPR2)  += mips/intrapred16_dspr2.c
82
83DSP_SRCS-$(HAVE_DSPR2)  += mips/common_dspr2.h
84DSP_SRCS-$(HAVE_DSPR2)  += mips/common_dspr2.c
85
86# interpolation filters
87DSP_SRCS-yes += vpx_convolve.c
88DSP_SRCS-yes += vpx_convolve.h
89DSP_SRCS-yes += vpx_filter.h
90
91DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/convolve.h
92
93DSP_SRCS-$(HAVE_SSE2) += x86/convolve_sse2.h
94DSP_SRCS-$(HAVE_SSSE3) += x86/convolve_ssse3.h
95DSP_SRCS-$(HAVE_AVX2) += x86/convolve_avx2.h
96DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_subpixel_8t_sse2.asm
97DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_subpixel_4t_intrin_sse2.c
98DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_subpixel_bilinear_sse2.asm
99DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm
100DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_bilinear_ssse3.asm
101DSP_SRCS-$(HAVE_AVX2)  += x86/vpx_subpixel_8t_intrin_avx2.c
102DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_intrin_ssse3.c
103ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
104DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_high_subpixel_8t_sse2.asm
105DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_high_subpixel_bilinear_sse2.asm
106DSP_SRCS-$(HAVE_AVX2)  += x86/highbd_convolve_avx2.c
107DSP_SRCS-$(HAVE_NEON)  += arm/highbd_vpx_convolve_copy_neon.c
108DSP_SRCS-$(HAVE_NEON)  += arm/highbd_vpx_convolve_avg_neon.c
109DSP_SRCS-$(HAVE_NEON)  += arm/highbd_vpx_convolve8_neon.c
110DSP_SRCS-$(HAVE_NEON)  += arm/highbd_vpx_convolve_neon.c
111endif
112
113DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_convolve_copy_sse2.asm
114DSP_SRCS-$(HAVE_NEON)  += arm/vpx_scaled_convolve8_neon.c
115
116
117ifeq ($(HAVE_NEON_ASM),yes)
118DSP_SRCS-yes += arm/vpx_convolve_copy_neon_asm$(ASM)
119DSP_SRCS-yes += arm/vpx_convolve8_horiz_filter_type2_neon$(ASM)
120DSP_SRCS-yes += arm/vpx_convolve8_vert_filter_type2_neon$(ASM)
121DSP_SRCS-yes += arm/vpx_convolve8_horiz_filter_type1_neon$(ASM)
122DSP_SRCS-yes += arm/vpx_convolve8_vert_filter_type1_neon$(ASM)
123DSP_SRCS-yes += arm/vpx_convolve8_avg_horiz_filter_type2_neon$(ASM)
124DSP_SRCS-yes += arm/vpx_convolve8_avg_vert_filter_type2_neon$(ASM)
125DSP_SRCS-yes += arm/vpx_convolve8_avg_horiz_filter_type1_neon$(ASM)
126DSP_SRCS-yes += arm/vpx_convolve8_avg_vert_filter_type1_neon$(ASM)
127DSP_SRCS-yes += arm/vpx_convolve_avg_neon_asm$(ASM)
128DSP_SRCS-yes += arm/vpx_convolve8_neon_asm.c
129DSP_SRCS-yes += arm/vpx_convolve8_neon_asm.h
130DSP_SRCS-yes += arm/vpx_convolve_neon.c
131else
132ifeq ($(HAVE_NEON),yes)
133DSP_SRCS-yes += arm/vpx_convolve_copy_neon.c
134DSP_SRCS-yes += arm/vpx_convolve8_neon.c
135DSP_SRCS-yes += arm/vpx_convolve_avg_neon.c
136DSP_SRCS-yes += arm/vpx_convolve_neon.c
137endif  # HAVE_NEON
138endif  # HAVE_NEON_ASM
139
140# common (msa)
141DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_horiz_msa.c
142DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_msa.c
143DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_vert_msa.c
144DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_horiz_msa.c
145DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_msa.c
146DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_vert_msa.c
147DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_avg_msa.c
148DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_copy_msa.c
149DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_msa.h
150DSP_SRCS-$(HAVE_MMI) += mips/vpx_convolve8_mmi.c
151
152# common (dspr2)
153DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve_common_dspr2.h
154DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_avg_dspr2.c
155DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_avg_horiz_dspr2.c
156DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_dspr2.c
157DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_horiz_dspr2.c
158DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_vert_dspr2.c
159DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_avg_dspr2.c
160DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_avg_horiz_dspr2.c
161DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_dspr2.c
162DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_horiz_dspr2.c
163DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_vert_dspr2.c
164
165DSP_SRCS-$(HAVE_VSX)  += ppc/vpx_convolve_vsx.c
166
167# loop filters
168DSP_SRCS-yes += loopfilter.c
169
170DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64)   += x86/loopfilter_sse2.c
171DSP_SRCS-$(HAVE_AVX2)                += x86/loopfilter_avx2.c
172
173ifeq ($(HAVE_NEON_ASM),yes)
174DSP_SRCS-yes  += arm/loopfilter_16_neon$(ASM)
175DSP_SRCS-yes  += arm/loopfilter_8_neon$(ASM)
176DSP_SRCS-yes  += arm/loopfilter_4_neon$(ASM)
177else
178DSP_SRCS-$(HAVE_NEON)   += arm/loopfilter_neon.c
179endif  # HAVE_NEON_ASM
180
181DSP_SRCS-$(HAVE_MSA)    += mips/loopfilter_msa.h
182DSP_SRCS-$(HAVE_MSA)    += mips/loopfilter_16_msa.c
183DSP_SRCS-$(HAVE_MSA)    += mips/loopfilter_8_msa.c
184DSP_SRCS-$(HAVE_MSA)    += mips/loopfilter_4_msa.c
185DSP_SRCS-$(HAVE_DSPR2)  += mips/loopfilter_filters_dspr2.h
186DSP_SRCS-$(HAVE_DSPR2)  += mips/loopfilter_filters_dspr2.c
187DSP_SRCS-$(HAVE_DSPR2)  += mips/loopfilter_macros_dspr2.h
188DSP_SRCS-$(HAVE_DSPR2)  += mips/loopfilter_masks_dspr2.h
189DSP_SRCS-$(HAVE_DSPR2)  += mips/loopfilter_mb_dspr2.c
190DSP_SRCS-$(HAVE_DSPR2)  += mips/loopfilter_mb_horiz_dspr2.c
191DSP_SRCS-$(HAVE_DSPR2)  += mips/loopfilter_mb_vert_dspr2.c
192
193ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
194DSP_SRCS-$(HAVE_NEON)   += arm/highbd_loopfilter_neon.c
195DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_loopfilter_sse2.c
196endif  # CONFIG_VP9_HIGHBITDEPTH
197
198DSP_SRCS-yes            += txfm_common.h
199DSP_SRCS-$(HAVE_SSE2)   += x86/txfm_common_sse2.h
200DSP_SRCS-$(HAVE_MSA)    += mips/txfm_macros_msa.h
201# forward transform
202ifeq ($(CONFIG_VP9_ENCODER),yes)
203DSP_SRCS-yes            += fwd_txfm.c
204DSP_SRCS-yes            += fwd_txfm.h
205DSP_SRCS-$(HAVE_SSE2)   += x86/fwd_txfm_sse2.h
206DSP_SRCS-$(HAVE_SSE2)   += x86/fwd_txfm_sse2.c
207DSP_SRCS-$(HAVE_SSE2)   += x86/fwd_txfm_impl_sse2.h
208DSP_SRCS-$(HAVE_SSE2)   += x86/fwd_dct32x32_impl_sse2.h
209ifeq ($(ARCH_X86_64),yes)
210DSP_SRCS-$(HAVE_SSSE3)  += x86/fwd_txfm_ssse3_x86_64.asm
211endif
212DSP_SRCS-$(HAVE_AVX2)   += x86/fwd_txfm_avx2.c
213DSP_SRCS-$(HAVE_AVX2)   += x86/fwd_dct32x32_impl_avx2.h
214DSP_SRCS-$(HAVE_NEON)   += arm/fdct_neon.c
215DSP_SRCS-$(HAVE_NEON)   += arm/fdct16x16_neon.c
216DSP_SRCS-$(HAVE_NEON)   += arm/fdct32x32_neon.c
217DSP_SRCS-$(HAVE_NEON)   += arm/fdct_partial_neon.c
218DSP_SRCS-$(HAVE_NEON)   += arm/fwd_txfm_neon.c
219DSP_SRCS-$(HAVE_MSA)    += mips/fwd_txfm_msa.h
220DSP_SRCS-$(HAVE_MSA)    += mips/fwd_txfm_msa.c
221DSP_SRCS-$(HAVE_MSA)    += mips/fwd_dct32x32_msa.c
222DSP_SRCS-$(HAVE_VSX)    += ppc/fdct32x32_vsx.c
223endif  # CONFIG_VP9_ENCODER
224
225# inverse transform
226ifeq ($(CONFIG_VP9),yes)
227DSP_SRCS-yes            += inv_txfm.h
228DSP_SRCS-yes            += inv_txfm.c
229DSP_SRCS-$(HAVE_SSE2)   += x86/inv_txfm_sse2.h
230DSP_SRCS-$(HAVE_SSE2)   += x86/inv_txfm_sse2.c
231DSP_SRCS-$(HAVE_SSE2)   += x86/inv_wht_sse2.asm
232DSP_SRCS-$(HAVE_SSSE3)  += x86/inv_txfm_ssse3.h
233DSP_SRCS-$(HAVE_SSSE3)  += x86/inv_txfm_ssse3.c
234
235DSP_SRCS-$(HAVE_NEON_ASM) += arm/save_reg_neon$(ASM)
236
237DSP_SRCS-$(HAVE_VSX) += ppc/inv_txfm_vsx.c
238
239ifneq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
240DSP_SRCS-$(HAVE_MSA)   += mips/inv_txfm_msa.h
241DSP_SRCS-$(HAVE_MSA)   += mips/idct4x4_msa.c
242DSP_SRCS-$(HAVE_MSA)   += mips/idct8x8_msa.c
243DSP_SRCS-$(HAVE_MSA)   += mips/idct16x16_msa.c
244DSP_SRCS-$(HAVE_MSA)   += mips/idct32x32_msa.c
245
246DSP_SRCS-$(HAVE_DSPR2) += mips/inv_txfm_dspr2.h
247DSP_SRCS-$(HAVE_DSPR2) += mips/itrans4_dspr2.c
248DSP_SRCS-$(HAVE_DSPR2) += mips/itrans8_dspr2.c
249DSP_SRCS-$(HAVE_DSPR2) += mips/itrans16_dspr2.c
250DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_dspr2.c
251DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_cols_dspr2.c
252else  # CONFIG_VP9_HIGHBITDEPTH
253DSP_SRCS-$(HAVE_NEON)  += arm/highbd_idct4x4_add_neon.c
254DSP_SRCS-$(HAVE_NEON)  += arm/highbd_idct8x8_add_neon.c
255DSP_SRCS-$(HAVE_NEON)  += arm/highbd_idct16x16_add_neon.c
256DSP_SRCS-$(HAVE_NEON)  += arm/highbd_idct32x32_add_neon.c
257DSP_SRCS-$(HAVE_NEON)  += arm/highbd_idct32x32_34_add_neon.c
258DSP_SRCS-$(HAVE_NEON)  += arm/highbd_idct32x32_135_add_neon.c
259DSP_SRCS-$(HAVE_NEON)  += arm/highbd_idct32x32_1024_add_neon.c
260DSP_SRCS-$(HAVE_NEON)  += arm/highbd_idct_neon.h
261DSP_SRCS-$(HAVE_SSE2)  += x86/highbd_inv_txfm_sse2.h
262DSP_SRCS-$(HAVE_SSE2)  += x86/highbd_idct4x4_add_sse2.c
263DSP_SRCS-$(HAVE_SSE2)  += x86/highbd_idct8x8_add_sse2.c
264DSP_SRCS-$(HAVE_SSE2)  += x86/highbd_idct16x16_add_sse2.c
265DSP_SRCS-$(HAVE_SSE2)  += x86/highbd_idct32x32_add_sse2.c
266DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_inv_txfm_sse4.h
267DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_idct4x4_add_sse4.c
268DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_idct8x8_add_sse4.c
269DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_idct16x16_add_sse4.c
270DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_idct32x32_add_sse4.c
271endif  # !CONFIG_VP9_HIGHBITDEPTH
272
273ifeq ($(HAVE_NEON_ASM),yes)
274DSP_SRCS-yes += arm/idct_neon$(ASM)
275DSP_SRCS-yes += arm/idct4x4_1_add_neon$(ASM)
276DSP_SRCS-yes += arm/idct4x4_add_neon$(ASM)
277else
278DSP_SRCS-$(HAVE_NEON) += arm/idct4x4_1_add_neon.c
279DSP_SRCS-$(HAVE_NEON) += arm/idct4x4_add_neon.c
280endif  # HAVE_NEON_ASM
281DSP_SRCS-$(HAVE_NEON) += arm/idct_neon.h
282DSP_SRCS-$(HAVE_NEON) += arm/idct8x8_1_add_neon.c
283DSP_SRCS-$(HAVE_NEON) += arm/idct8x8_add_neon.c
284DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_1_add_neon.c
285DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_add_neon.c
286DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_1_add_neon.c
287DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_34_add_neon.c
288DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_135_add_neon.c
289DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_add_neon.c
290
291endif  # CONFIG_VP9
292
293# quantization
294ifeq ($(CONFIG_VP9_ENCODER),yes)
295DSP_SRCS-yes            += quantize.c
296DSP_SRCS-yes            += quantize.h
297
298DSP_SRCS-$(HAVE_SSE2)   += x86/quantize_sse2.c
299DSP_SRCS-$(HAVE_SSE2)   += x86/quantize_sse2.h
300DSP_SRCS-$(HAVE_SSSE3)  += x86/quantize_ssse3.c
301DSP_SRCS-$(HAVE_SSSE3)  += x86/quantize_ssse3.h
302DSP_SRCS-$(HAVE_AVX)    += x86/quantize_avx.c
303DSP_SRCS-$(HAVE_NEON)   += arm/quantize_neon.c
304DSP_SRCS-$(HAVE_VSX)    += ppc/quantize_vsx.c
305ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
306DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_quantize_intrin_sse2.c
307endif
308
309# avg
310DSP_SRCS-yes           += avg.c
311DSP_SRCS-$(HAVE_SSE2)  += x86/avg_intrin_sse2.c
312DSP_SRCS-$(HAVE_AVX2)  += x86/avg_intrin_avx2.c
313DSP_SRCS-$(HAVE_NEON)  += arm/avg_neon.c
314DSP_SRCS-$(HAVE_NEON)  += arm/hadamard_neon.c
315DSP_SRCS-$(HAVE_MSA)   += mips/avg_msa.c
316ifeq ($(ARCH_X86_64),yes)
317DSP_SRCS-$(HAVE_SSSE3) += x86/avg_ssse3_x86_64.asm
318endif
319DSP_SRCS-$(HAVE_VSX)   += ppc/hadamard_vsx.c
320
321endif  # CONFIG_VP9_ENCODER
322
323# skin detection
324DSP_SRCS-yes            += skin_detection.h
325DSP_SRCS-yes            += skin_detection.c
326
327ifeq ($(CONFIG_ENCODERS),yes)
328DSP_SRCS-yes            += sad.c
329DSP_SRCS-yes            += subtract.c
330DSP_SRCS-yes            += sum_squares.c
331DSP_SRCS-$(HAVE_NEON)   += arm/sum_squares_neon.c
332DSP_SRCS-$(HAVE_SSE2)   += x86/sum_squares_sse2.c
333DSP_SRCS-$(HAVE_MSA)    += mips/sum_squares_msa.c
334
335DSP_SRCS-$(HAVE_NEON)   += arm/sad4d_neon.c
336DSP_SRCS-$(HAVE_NEON)   += arm/sad_neon.c
337DSP_SRCS-$(HAVE_NEON)   += arm/subtract_neon.c
338
339DSP_SRCS-$(HAVE_MSA)    += mips/sad_msa.c
340DSP_SRCS-$(HAVE_MSA)    += mips/subtract_msa.c
341
342DSP_SRCS-$(HAVE_MMI)    += mips/sad_mmi.c
343DSP_SRCS-$(HAVE_MMI)    += mips/subtract_mmi.c
344
345DSP_SRCS-$(HAVE_SSE3)   += x86/sad_sse3.asm
346DSP_SRCS-$(HAVE_SSSE3)  += x86/sad_ssse3.asm
347DSP_SRCS-$(HAVE_SSE4_1) += x86/sad_sse4.asm
348DSP_SRCS-$(HAVE_AVX2)   += x86/sad4d_avx2.c
349DSP_SRCS-$(HAVE_AVX2)   += x86/sad_avx2.c
350DSP_SRCS-$(HAVE_AVX512) += x86/sad4d_avx512.c
351
352DSP_SRCS-$(HAVE_SSE)    += x86/sad4d_sse2.asm
353DSP_SRCS-$(HAVE_SSE)    += x86/sad_sse2.asm
354DSP_SRCS-$(HAVE_SSE2)   += x86/sad4d_sse2.asm
355DSP_SRCS-$(HAVE_SSE2)   += x86/sad_sse2.asm
356DSP_SRCS-$(HAVE_SSE2)   += x86/subtract_sse2.asm
357
358DSP_SRCS-$(HAVE_VSX) += ppc/sad_vsx.c
359DSP_SRCS-$(HAVE_VSX) += ppc/subtract_vsx.c
360
361ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
362DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad4d_sse2.asm
363DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad_sse2.asm
364endif  # CONFIG_VP9_HIGHBITDEPTH
365
366endif  # CONFIG_ENCODERS
367
368ifneq ($(filter yes,$(CONFIG_ENCODERS) $(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),)
369DSP_SRCS-yes            += variance.c
370DSP_SRCS-yes            += variance.h
371
372DSP_SRCS-$(HAVE_NEON)   += arm/avg_pred_neon.c
373DSP_SRCS-$(HAVE_NEON)   += arm/subpel_variance_neon.c
374DSP_SRCS-$(HAVE_NEON)   += arm/variance_neon.c
375
376DSP_SRCS-$(HAVE_MSA)    += mips/variance_msa.c
377DSP_SRCS-$(HAVE_MSA)    += mips/sub_pixel_variance_msa.c
378
379DSP_SRCS-$(HAVE_MMI)    += mips/variance_mmi.c
380
381DSP_SRCS-$(HAVE_SSE)    += x86/variance_sse2.c
382DSP_SRCS-$(HAVE_SSE2)   += x86/avg_pred_sse2.c
383DSP_SRCS-$(HAVE_SSE2)   += x86/variance_sse2.c  # Contains SSE2 and SSSE3
384DSP_SRCS-$(HAVE_AVX2)   += x86/variance_avx2.c
385DSP_SRCS-$(HAVE_VSX)    += ppc/variance_vsx.c
386
387ifeq ($(ARCH_X86_64),yes)
388DSP_SRCS-$(HAVE_SSE2)   += x86/ssim_opt_x86_64.asm
389endif  # ARCH_X86_64
390
391DSP_SRCS-$(HAVE_SSE)    += x86/subpel_variance_sse2.asm
392DSP_SRCS-$(HAVE_SSE2)   += x86/subpel_variance_sse2.asm  # Contains SSE2 and SSSE3
393
394ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
395DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_variance_sse2.c
396DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_variance_impl_sse2.asm
397DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_subpel_variance_impl_sse2.asm
398endif  # CONFIG_VP9_HIGHBITDEPTH
399endif  # CONFIG_ENCODERS || CONFIG_POSTPROC || CONFIG_VP9_POSTPROC
400
401# Neon utilities
402DSP_SRCS-$(HAVE_NEON) += arm/mem_neon.h
403DSP_SRCS-$(HAVE_NEON) += arm/sum_neon.h
404DSP_SRCS-$(HAVE_NEON) += arm/transpose_neon.h
405DSP_SRCS-$(HAVE_NEON) += arm/vpx_convolve8_neon.h
406
407# PPC VSX utilities
408DSP_SRCS-$(HAVE_VSX)  += ppc/types_vsx.h
409DSP_SRCS-$(HAVE_VSX)  += ppc/txfm_common_vsx.h
410DSP_SRCS-$(HAVE_VSX)  += ppc/transpose_vsx.h
411DSP_SRCS-$(HAVE_VSX)  += ppc/bitdepth_conversion_vsx.h
412
413# X86 utilities
414DSP_SRCS-$(HAVE_SSE2) += x86/mem_sse2.h
415DSP_SRCS-$(HAVE_SSE2) += x86/transpose_sse2.h
416
417DSP_SRCS-no += $(DSP_SRCS_REMOVE-yes)
418
419DSP_SRCS-yes += vpx_dsp_rtcd.c
420DSP_SRCS-yes += vpx_dsp_rtcd_defs.pl
421
422$(eval $(call rtcd_h_template,vpx_dsp_rtcd,vpx_dsp/vpx_dsp_rtcd_defs.pl))
423