1 //===-------- ARMBuildAttrs.h - ARM Build Attributes ------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains enumerations and support routines for ARM build attributes 11 // as defined in ARM ABI addenda document (ABI release 2.08). 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef __TARGET_ARMBUILDATTRS_H__ 16 #define __TARGET_ARMBUILDATTRS_H__ 17 18 namespace ARMBuildAttrs { 19 enum SpecialAttr { 20 // This is for the .cpu asm attr. It translates into one or more 21 // AttrType (below) entries in the .ARM.attributes section in the ELF. 22 SEL_CPU 23 }; 24 25 enum AttrType { 26 // Rest correspond to ELF/.ARM.attributes 27 File = 1, 28 Section = 2, 29 Symbol = 3, 30 CPU_raw_name = 4, 31 CPU_name = 5, 32 CPU_arch = 6, 33 CPU_arch_profile = 7, 34 ARM_ISA_use = 8, 35 THUMB_ISA_use = 9, 36 VFP_arch = 10, 37 WMMX_arch = 11, 38 Advanced_SIMD_arch = 12, 39 PCS_config = 13, 40 ABI_PCS_R9_use = 14, 41 ABI_PCS_RW_data = 15, 42 ABI_PCS_RO_data = 16, 43 ABI_PCS_GOT_use = 17, 44 ABI_PCS_wchar_t = 18, 45 ABI_FP_rounding = 19, 46 ABI_FP_denormal = 20, 47 ABI_FP_exceptions = 21, 48 ABI_FP_user_exceptions = 22, 49 ABI_FP_number_model = 23, 50 ABI_align8_needed = 24, 51 ABI_align8_preserved = 25, 52 ABI_enum_size = 26, 53 ABI_HardFP_use = 27, 54 ABI_VFP_args = 28, 55 ABI_WMMX_args = 29, 56 ABI_optimization_goals = 30, 57 ABI_FP_optimization_goals = 31, 58 compatibility = 32, 59 CPU_unaligned_access = 34, 60 VFP_HP_extension = 36, 61 ABI_FP_16bit_format = 38, 62 MPextension_use = 42, // was 70, 2.08 ABI 63 DIV_use = 44, 64 nodefaults = 64, 65 also_compatible_with = 65, 66 T2EE_use = 66, 67 conformance = 67, 68 Virtualization_use = 68, 69 MPextension_use_old = 70 70 }; 71 72 // Magic numbers for .ARM.attributes 73 enum AttrMagic { 74 Format_Version = 0x41 75 }; 76 77 // Legal Values for CPU_arch, (=6), uleb128 78 enum CPUArch { 79 Pre_v4 = 0, 80 v4 = 1, // e.g. SA110 81 v4T = 2, // e.g. ARM7TDMI 82 v5T = 3, // e.g. ARM9TDMI 83 v5TE = 4, // e.g. ARM946E_S 84 v5TEJ = 5, // e.g. ARM926EJ_S 85 v6 = 6, // e.g. ARM1136J_S 86 v6KZ = 7, // e.g. ARM1176JZ_S 87 v6T2 = 8, // e.g. ARM1156T2F_S 88 v6K = 9, // e.g. ARM1136J_S 89 v7 = 10, // e.g. Cortex A8, Cortex M3 90 v6_M = 11, // e.g. Cortex M1 91 v6S_M = 12, // v6_M with the System extensions 92 v7E_M = 13 // v7_M with DSP extensions 93 }; 94 95 enum CPUArchProfile { // (=7), uleb128 96 Not_Applicable = 0, // pre v7, or cross-profile code 97 ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8) 98 RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4) 99 MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3) 100 SystemProfile = (0x53) // 'S' Application or real-time profile 101 }; 102 103 // The following have a lot of common use cases 104 enum { 105 //ARMISAUse (=8), uleb128 and THUMBISAUse (=9), uleb128 106 Not_Allowed = 0, 107 Allowed = 1, 108 109 // FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10) 110 AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA) 111 AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA) 112 AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31 113 AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA) 114 AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31 115 116 // Tag_WMMX_arch, (=11), uleb128 117 AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions) 118 119 // Tag_WMMX_arch, (=11), uleb128 120 AllowWMMXv1 = 2, // The user permitted this entity to use WMMX v2 121 122 // Tag_ABI_FP_denormal, (=20), uleb128 123 PreserveFPSign = 2, // sign when flushed-to-zero is preserved 124 125 // Tag_ABI_FP_number_model, (=23), uleb128 126 AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI]) 127 AllowIEE754 = 3 // this code to use all the IEEE 754-defined FP encodings 128 }; 129 } 130 131 #endif // __TARGET_ARMBUILDATTRS_H__ 132