1;------------------------------------------------------------------------------ 2; @file 3; First code executed by processor after resetting. 4; 5; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR> 6; This program and the accompanying materials 7; are licensed and made available under the terms and conditions of the BSD License 8; which accompanies this distribution. The full text of the license may be found at 9; http://opensource.org/licenses/bsd-license.php 10; 11; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13; 14;------------------------------------------------------------------------------ 15 16BITS 16 17 18ALIGN 16 19 20; 21; Pad the image size to 4k when page tables are in VTF0 22; 23; If the VTF0 image has page tables built in, then we need to make 24; sure the end of VTF0 is 4k above where the page tables end. 25; 26; This is required so the page tables will be 4k aligned when VTF0 is 27; located just below 0x100000000 (4GB) in the firmware device. 28; 29%ifdef ALIGN_TOP_TO_4K_FOR_PAGING 30 TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0 31%endif 32 33applicationProcessorEntryPoint: 34; 35; Application Processors entry point 36; 37; GenFv generates code aligned on a 4k boundary which will jump to this 38; location. (0xffffffe0) This allows the Local APIC Startup IPI to be 39; used to wake up the application processors. 40; 41 jmp EarlyApInitReal16 42 43ALIGN 8 44 45 DD 0 46 47; 48; The VTF signature 49; 50; VTF-0 means that the VTF (Volume Top File) code does not require 51; any fixups. 52; 53vtfSignature: 54 DB 'V', 'T', 'F', 0 55 56ALIGN 16 57 58resetVector: 59; 60; Reset Vector 61; 62; This is where the processor will begin execution 63; 64 nop 65 nop 66 jmp EarlyBspInitReal16 67 68ALIGN 16 69 70fourGigabytes: 71 72