1 //===- LiveRegUnits.cpp - Register Unit Set -------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file This file imlements the LiveRegUnits set.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "llvm/CodeGen/LiveRegUnits.h"
15
16 #include "llvm/CodeGen/MachineBasicBlock.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstrBundle.h"
20 #include "llvm/CodeGen/MachineOperand.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/TargetRegisterInfo.h"
23 #include "llvm/MC/MCRegisterInfo.h"
24
25 using namespace llvm;
26
removeRegsNotPreserved(const uint32_t * RegMask)27 void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) {
28 for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
29 for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
30 if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
31 Units.reset(U);
32 }
33 }
34 }
35
addRegsInMask(const uint32_t * RegMask)36 void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
37 for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
38 for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
39 if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
40 Units.set(U);
41 }
42 }
43 }
44
stepBackward(const MachineInstr & MI)45 void LiveRegUnits::stepBackward(const MachineInstr &MI) {
46 // Remove defined registers and regmask kills from the set.
47 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
48 if (O->isReg()) {
49 if (!O->isDef() || O->isDebug())
50 continue;
51 unsigned Reg = O->getReg();
52 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
53 continue;
54 removeReg(Reg);
55 } else if (O->isRegMask())
56 removeRegsNotPreserved(O->getRegMask());
57 }
58
59 // Add uses to the set.
60 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
61 if (!O->isReg() || !O->readsReg() || O->isDebug())
62 continue;
63 unsigned Reg = O->getReg();
64 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
65 continue;
66 addReg(Reg);
67 }
68 }
69
accumulate(const MachineInstr & MI)70 void LiveRegUnits::accumulate(const MachineInstr &MI) {
71 // Add defs, uses and regmask clobbers to the set.
72 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
73 if (O->isReg()) {
74 unsigned Reg = O->getReg();
75 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
76 continue;
77 if (!O->isDef() && !O->readsReg())
78 continue;
79 addReg(Reg);
80 } else if (O->isRegMask())
81 addRegsInMask(O->getRegMask());
82 }
83 }
84
85 /// Add live-in registers of basic block \p MBB to \p LiveUnits.
addBlockLiveIns(LiveRegUnits & LiveUnits,const MachineBasicBlock & MBB)86 static void addBlockLiveIns(LiveRegUnits &LiveUnits,
87 const MachineBasicBlock &MBB) {
88 for (const auto &LI : MBB.liveins())
89 LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
90 }
91
92 /// Adds all callee saved registers to \p LiveUnits.
addCalleeSavedRegs(LiveRegUnits & LiveUnits,const MachineFunction & MF)93 static void addCalleeSavedRegs(LiveRegUnits &LiveUnits,
94 const MachineFunction &MF) {
95 const MachineRegisterInfo &MRI = MF.getRegInfo();
96 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)
97 LiveUnits.addReg(*CSR);
98 }
99
addPristines(const MachineFunction & MF)100 void LiveRegUnits::addPristines(const MachineFunction &MF) {
101 const MachineFrameInfo &MFI = MF.getFrameInfo();
102 if (!MFI.isCalleeSavedInfoValid())
103 return;
104 /// This function will usually be called on an empty object, handle this
105 /// as a special case.
106 if (empty()) {
107 /// Add all callee saved regs, then remove the ones that are saved and
108 /// restored.
109 addCalleeSavedRegs(*this, MF);
110 /// Remove the ones that are not saved/restored; they are pristine.
111 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
112 removeReg(Info.getReg());
113 return;
114 }
115 /// If a callee-saved register that is not pristine is already present
116 /// in the set, we should make sure that it stays in it. Precompute the
117 /// set of pristine registers in a separate object.
118 /// Add all callee saved regs, then remove the ones that are saved+restored.
119 LiveRegUnits Pristine(*TRI);
120 addCalleeSavedRegs(Pristine, MF);
121 /// Remove the ones that are not saved/restored; they are pristine.
122 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
123 Pristine.removeReg(Info.getReg());
124 addUnits(Pristine.getBitVector());
125 }
126
addLiveOuts(const MachineBasicBlock & MBB)127 void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
128 const MachineFunction &MF = *MBB.getParent();
129 if (!MBB.succ_empty()) {
130 addPristines(MF);
131 // To get the live-outs we simply merge the live-ins of all successors.
132 for (const MachineBasicBlock *Succ : MBB.successors())
133 addBlockLiveIns(*this, *Succ);
134 } else if (MBB.isReturnBlock()) {
135 // For the return block: Add all callee saved registers.
136 const MachineFrameInfo &MFI = MF.getFrameInfo();
137 if (MFI.isCalleeSavedInfoValid())
138 addCalleeSavedRegs(*this, MF);
139 }
140 }
141
addLiveIns(const MachineBasicBlock & MBB)142 void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) {
143 const MachineFunction &MF = *MBB.getParent();
144 addPristines(MF);
145 addBlockLiveIns(*this, MBB);
146 }
147