1 //===-- RISCVMCTargetDesc.h - RISCV Target Descriptions ---------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides RISCV specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H 15 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H 16 17 #include "llvm/Config/config.h" 18 #include "llvm/MC/MCTargetOptions.h" 19 #include "llvm/Support/DataTypes.h" 20 #include <memory> 21 22 namespace llvm { 23 class MCAsmBackend; 24 class MCCodeEmitter; 25 class MCContext; 26 class MCInstrInfo; 27 class MCObjectTargetWriter; 28 class MCRegisterInfo; 29 class MCSubtargetInfo; 30 class StringRef; 31 class Target; 32 class Triple; 33 class raw_ostream; 34 class raw_pwrite_stream; 35 36 Target &getTheRISCV32Target(); 37 Target &getTheRISCV64Target(); 38 39 MCCodeEmitter *createRISCVMCCodeEmitter(const MCInstrInfo &MCII, 40 const MCRegisterInfo &MRI, 41 MCContext &Ctx); 42 43 MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI, 44 const MCRegisterInfo &MRI, 45 const MCTargetOptions &Options); 46 47 std::unique_ptr<MCObjectTargetWriter> createRISCVELFObjectWriter(uint8_t OSABI, 48 bool Is64Bit); 49 } 50 51 // Defines symbolic names for RISC-V registers. 52 #define GET_REGINFO_ENUM 53 #include "RISCVGenRegisterInfo.inc" 54 55 // Defines symbolic names for RISC-V instructions. 56 #define GET_INSTRINFO_ENUM 57 #include "RISCVGenInstrInfo.inc" 58 59 #define GET_SUBTARGETINFO_ENUM 60 #include "RISCVGenSubtargetInfo.inc" 61 62 #endif 63