1;; @file 2; This is the assembly code for transferring to control to OS S3 waking vector 3; for X64 platform 4; 5; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> 6; 7; This program and the accompanying materials 8; are licensed and made available under the terms and conditions of the BSD License 9; which accompanies this distribution. The full text of the license may be found at 10; http://opensource.org/licenses/bsd-license.php 11; 12; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14; 15;; 16 17extern ASM_PFX(mOriginalHandler) 18extern ASM_PFX(PageFaultHandler) 19 20 DEFAULT REL 21 SECTION .text 22 23global ASM_PFX(AsmFixAddress16) 24global ASM_PFX(AsmJmpAddr32) 25 26global ASM_PFX(AsmTransferControl) 27ASM_PFX(AsmTransferControl): 28 ; rcx S3WakingVector :DWORD 29 ; rdx AcpiLowMemoryBase :DWORD 30 lea eax, [.0] 31 mov r8, 0x2800000000 32 or rax, r8 33 push rax 34 shrd ebx, ecx, 20 35 and ecx, 0xf 36 mov bx, cx 37 mov [@jmp_addr + 1], ebx 38 retf 39BITS 16 40.0: 41 mov ax, 0x30 42 mov ds, ax 43 mov es, ax 44 mov fs, ax 45 mov gs, ax 46 mov ss, ax 47 mov eax, cr0 48 mov ebx, cr4 49 and eax, ((~ 0x80000001) & 0xffffffff) 50 and bl, ~ (1 << 5) 51 mov cr0, eax 52 mov ecx, 0xc0000080 53 rdmsr 54 and ah, ~ 1 55 wrmsr 56 mov cr4, ebx 57@jmp_addr: 58 jmp 0x0:0x0 59 60global ASM_PFX(AsmTransferControl32) 61ASM_PFX(AsmTransferControl32): 62BITS 32 63 ; S3WakingVector :DWORD 64 ; AcpiLowMemoryBase :DWORD 65 push ebp 66 mov ebp, esp 67 DB 0x8d, 0x5 ; lea eax, AsmTransferControl16 68ASM_PFX(AsmFixAddress16): DD 0 69 push 0x28 ; CS 70 push eax 71 retf 72 73global ASM_PFX(AsmTransferControl16) 74ASM_PFX(AsmTransferControl16): 75BITS 16 76 mov ax, 0x30 77o32 mov ds, eax 78o32 mov es, eax 79o32 mov fs, eax 80o32 mov gs, eax 81o32 mov ss, eax 82 mov eax, cr0 ; Get control register 0 83 and eax, 0fffffffeh ; Clear PE bit (bit #0) 84 mov cr0, eax ; Activate real mode 85 DB 0xea ; jmp far AsmJmpAddr32 86ASM_PFX(AsmJmpAddr32): DD 0 87 88global ASM_PFX(PageFaultHandlerHook) 89ASM_PFX(PageFaultHandlerHook): 90BITS 64 91 push rax ; save all volatile registers 92 push rcx 93 push rdx 94 push r8 95 push r9 96 push r10 97 push r11 98 ; save volatile fp registers 99 add rsp, -0x68 100 stmxcsr [rsp + 0x60] 101 movdqa [rsp + 0x0], xmm0 102 movdqa [rsp + 0x10], xmm1 103 movdqa [rsp + 0x20], xmm2 104 movdqa [rsp + 0x30], xmm3 105 movdqa [rsp + 0x40], xmm4 106 movdqa [rsp + 0x50], xmm5 107 108 add rsp, -0x20 109 call ASM_PFX(PageFaultHandler) 110 add rsp, 0x20 111 112 ; load volatile fp registers 113 ldmxcsr [rsp + 0x60] 114 movdqa xmm0, [rsp + 0x0] 115 movdqa xmm1, [rsp + 0x10] 116 movdqa xmm2, [rsp + 0x20] 117 movdqa xmm3, [rsp + 0x30] 118 movdqa xmm4, [rsp + 0x40] 119 movdqa xmm5, [rsp + 0x50] 120 add rsp, 0x68 121 122 test al, al 123 124 pop r11 125 pop r10 126 pop r9 127 pop r8 128 pop rdx 129 pop rcx 130 pop rax ; restore all volatile registers 131 jnz .1 132 jmp qword [ASM_PFX(mOriginalHandler)] 133.1: 134 add rsp, 0x8 ; skip error code for PF 135 iretq 136 137