1 /*
2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FD5_DRAW_H_
28 #define FD5_DRAW_H_
29
30 #include "pipe/p_context.h"
31
32 #include "freedreno_draw.h"
33
34 #include "fd5_context.h"
35
36 /* some bits in common w/ a4xx: */
37 #include "a4xx/fd4_draw.h"
38
39 void fd5_draw_init(struct pipe_context *pctx);
40
41 static inline void
fd5_draw(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,enum pc_di_src_sel src_sel,uint32_t count,uint32_t instances,enum a4xx_index_size idx_type,uint32_t idx_size,uint32_t idx_offset,struct pipe_resource * idx_buffer)42 fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
43 enum pc_di_primtype primtype,
44 enum pc_di_vis_cull_mode vismode,
45 enum pc_di_src_sel src_sel, uint32_t count,
46 uint32_t instances, enum a4xx_index_size idx_type,
47 uint32_t idx_size, uint32_t idx_offset,
48 struct pipe_resource *idx_buffer)
49 {
50 /* for debug after a lock up, write a unique counter value
51 * to scratch7 for each draw, to make it easier to match up
52 * register dumps to cmdstream. The combination of IB
53 * (scratch6) and DRAW is enough to "triangulate" the
54 * particular draw that caused lockup.
55 */
56 emit_marker5(ring, 7);
57
58 OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
59 if (vismode == USE_VISIBILITY) {
60 /* leave vis mode blank for now, it will be patched up when
61 * we know if we are binning or not
62 */
63 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
64 &batch->draw_patches);
65 } else {
66 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
67 }
68 OUT_RING(ring, instances); /* NumInstances */
69 OUT_RING(ring, count); /* NumIndices */
70 if (idx_buffer) {
71 OUT_RING(ring, 0x0); /* XXX */
72 OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
73 OUT_RING (ring, idx_size);
74 }
75
76 emit_marker5(ring, 7);
77
78 fd_reset_wfi(batch);
79 }
80
81 static inline void
fd5_draw_emit(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,const struct pipe_draw_info * info,unsigned index_offset)82 fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
83 enum pc_di_primtype primtype,
84 enum pc_di_vis_cull_mode vismode,
85 const struct pipe_draw_info *info,
86 unsigned index_offset)
87 {
88 struct pipe_resource *idx_buffer = NULL;
89 enum a4xx_index_size idx_type;
90 enum pc_di_src_sel src_sel;
91 uint32_t idx_size, idx_offset;
92
93 if (info->indirect) {
94 struct fd_resource *ind = fd_resource(info->indirect->buffer);
95
96 emit_marker5(ring, 7);
97
98 if (info->index_size) {
99 struct pipe_resource *idx = info->index.resource;
100 unsigned max_indicies = (idx->width0 - info->indirect->offset) /
101 info->index_size;
102
103 OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
104 OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
105 fd4_size2indextype(info->index_size), 0),
106 &batch->draw_patches);
107 OUT_RELOC(ring, fd_resource(idx)->bo,
108 index_offset, 0, 0);
109 OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indicies));
110 OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
111 } else {
112 OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
113 OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
114 &batch->draw_patches);
115 OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
116 }
117
118 emit_marker5(ring, 7);
119 fd_reset_wfi(batch);
120
121 return;
122 }
123
124 if (info->index_size) {
125 assert(!info->has_user_indices);
126
127 idx_buffer = info->index.resource;
128 idx_type = fd4_size2indextype(info->index_size);
129 idx_size = info->index_size * info->count;
130 idx_offset = index_offset + info->start * info->index_size;
131 src_sel = DI_SRC_SEL_DMA;
132 } else {
133 idx_buffer = NULL;
134 idx_type = INDEX4_SIZE_32_BIT;
135 idx_size = 0;
136 idx_offset = 0;
137 src_sel = DI_SRC_SEL_AUTO_INDEX;
138 }
139
140 fd5_draw(batch, ring, primtype, vismode, src_sel,
141 info->count, info->instance_count,
142 idx_type, idx_size, idx_offset, idx_buffer);
143 }
144
145 #endif /* FD5_DRAW_H_ */
146