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1 /*
2  * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Rob Clark <robclark@freedesktop.org>
25  */
26 
27 #include "pipe/p_state.h"
28 #include "util/u_string.h"
29 #include "util/u_memory.h"
30 #include "util/u_inlines.h"
31 #include "util/u_format.h"
32 
33 #include "fd5_texture.h"
34 #include "fd5_format.h"
35 
36 static enum a5xx_tex_clamp
tex_clamp(unsigned wrap,bool clamp_to_edge,bool * needs_border)37 tex_clamp(unsigned wrap, bool clamp_to_edge, bool *needs_border)
38 {
39 	/* Hardware does not support _CLAMP, but we emulate it: */
40 	if (wrap == PIPE_TEX_WRAP_CLAMP) {
41 		wrap = (clamp_to_edge) ?
42 			PIPE_TEX_WRAP_CLAMP_TO_EDGE : PIPE_TEX_WRAP_CLAMP_TO_BORDER;
43 	}
44 
45 	switch (wrap) {
46 	case PIPE_TEX_WRAP_REPEAT:
47 		return A5XX_TEX_REPEAT;
48 	case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
49 		return A5XX_TEX_CLAMP_TO_EDGE;
50 	case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
51 		*needs_border = true;
52 		return A5XX_TEX_CLAMP_TO_BORDER;
53 	case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
54 		/* only works for PoT.. need to emulate otherwise! */
55 		return A5XX_TEX_MIRROR_CLAMP;
56 	case PIPE_TEX_WRAP_MIRROR_REPEAT:
57 		return A5XX_TEX_MIRROR_REPEAT;
58 	case PIPE_TEX_WRAP_MIRROR_CLAMP:
59 	case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
60 		/* these two we could perhaps emulate, but we currently
61 		 * just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP
62 		 */
63 	default:
64 		DBG("invalid wrap: %u", wrap);
65 		return 0;
66 	}
67 }
68 
69 static enum a5xx_tex_filter
tex_filter(unsigned filter,bool aniso)70 tex_filter(unsigned filter, bool aniso)
71 {
72 	switch (filter) {
73 	case PIPE_TEX_FILTER_NEAREST:
74 		return A5XX_TEX_NEAREST;
75 	case PIPE_TEX_FILTER_LINEAR:
76 		return aniso ? A5XX_TEX_ANISO : A5XX_TEX_LINEAR;
77 	default:
78 		DBG("invalid filter: %u", filter);
79 		return 0;
80 	}
81 }
82 
83 static void *
fd5_sampler_state_create(struct pipe_context * pctx,const struct pipe_sampler_state * cso)84 fd5_sampler_state_create(struct pipe_context *pctx,
85 		const struct pipe_sampler_state *cso)
86 {
87 	struct fd5_sampler_stateobj *so = CALLOC_STRUCT(fd5_sampler_stateobj);
88 	unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8));
89 	bool miplinear = false;
90 	bool clamp_to_edge;
91 
92 	if (!so)
93 		return NULL;
94 
95 	so->base = *cso;
96 
97 	if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR)
98 		miplinear = true;
99 
100 	/*
101 	 * For nearest filtering, _CLAMP means _CLAMP_TO_EDGE;  for linear
102 	 * filtering, _CLAMP means _CLAMP_TO_BORDER while additionally
103 	 * clamping the texture coordinates to [0.0, 1.0].
104 	 *
105 	 * The clamping will be taken care of in the shaders.  There are two
106 	 * filters here, but let the minification one has a say.
107 	 */
108 	clamp_to_edge = (cso->min_img_filter == PIPE_TEX_FILTER_NEAREST);
109 	if (!clamp_to_edge) {
110 		so->saturate_s = (cso->wrap_s == PIPE_TEX_WRAP_CLAMP);
111 		so->saturate_t = (cso->wrap_t == PIPE_TEX_WRAP_CLAMP);
112 		so->saturate_r = (cso->wrap_r == PIPE_TEX_WRAP_CLAMP);
113 	}
114 
115 	so->needs_border = false;
116 	so->texsamp0 =
117 		COND(miplinear, A5XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) |
118 		A5XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) |
119 		A5XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) |
120 		A5XX_TEX_SAMP_0_ANISO(aniso) |
121 		A5XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge, &so->needs_border)) |
122 		A5XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge, &so->needs_border)) |
123 		A5XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge, &so->needs_border));
124 
125 	so->texsamp1 =
126 		COND(!cso->seamless_cube_map, A5XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF) |
127 		COND(!cso->normalized_coords, A5XX_TEX_SAMP_1_UNNORM_COORDS);
128 
129 	if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
130 		so->texsamp0 |= A5XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias);
131 		so->texsamp1 |=
132 			A5XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |
133 			A5XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);
134 	}
135 
136 	if (cso->compare_mode)
137 		so->texsamp1 |= A5XX_TEX_SAMP_1_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */
138 
139 	return so;
140 }
141 
142 static void
fd5_sampler_states_bind(struct pipe_context * pctx,enum pipe_shader_type shader,unsigned start,unsigned nr,void ** hwcso)143 fd5_sampler_states_bind(struct pipe_context *pctx,
144 		enum pipe_shader_type shader, unsigned start,
145 		unsigned nr, void **hwcso)
146 {
147 	struct fd_context *ctx = fd_context(pctx);
148 	struct fd5_context *fd5_ctx = fd5_context(ctx);
149 	uint16_t saturate_s = 0, saturate_t = 0, saturate_r = 0;
150 	unsigned i;
151 
152 	if (!hwcso)
153 		nr = 0;
154 
155 	for (i = 0; i < nr; i++) {
156 		if (hwcso[i]) {
157 			struct fd5_sampler_stateobj *sampler =
158 					fd5_sampler_stateobj(hwcso[i]);
159 			if (sampler->saturate_s)
160 				saturate_s |= (1 << i);
161 			if (sampler->saturate_t)
162 				saturate_t |= (1 << i);
163 			if (sampler->saturate_r)
164 				saturate_r |= (1 << i);
165 		}
166 	}
167 
168 	fd_sampler_states_bind(pctx, shader, start, nr, hwcso);
169 
170 	if (shader == PIPE_SHADER_FRAGMENT) {
171 		fd5_ctx->fsaturate =
172 			(saturate_s != 0) ||
173 			(saturate_t != 0) ||
174 			(saturate_r != 0);
175 		fd5_ctx->fsaturate_s = saturate_s;
176 		fd5_ctx->fsaturate_t = saturate_t;
177 		fd5_ctx->fsaturate_r = saturate_r;
178 	} else if (shader == PIPE_SHADER_VERTEX) {
179 		fd5_ctx->vsaturate =
180 			(saturate_s != 0) ||
181 			(saturate_t != 0) ||
182 			(saturate_r != 0);
183 		fd5_ctx->vsaturate_s = saturate_s;
184 		fd5_ctx->vsaturate_t = saturate_t;
185 		fd5_ctx->vsaturate_r = saturate_r;
186 	}
187 }
188 
189 static bool
use_astc_srgb_workaround(struct pipe_context * pctx,enum pipe_format format)190 use_astc_srgb_workaround(struct pipe_context *pctx, enum pipe_format format)
191 {
192 	return false;  // TODO check if this is still needed on a5xx
193 }
194 
195 static struct pipe_sampler_view *
fd5_sampler_view_create(struct pipe_context * pctx,struct pipe_resource * prsc,const struct pipe_sampler_view * cso)196 fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
197 		const struct pipe_sampler_view *cso)
198 {
199 	struct fd5_pipe_sampler_view *so = CALLOC_STRUCT(fd5_pipe_sampler_view);
200 	struct fd_resource *rsc = fd_resource(prsc);
201 	enum pipe_format format = cso->format;
202 	unsigned lvl, layers;
203 
204 	if (!so)
205 		return NULL;
206 
207 	if (format == PIPE_FORMAT_X32_S8X24_UINT) {
208 		rsc = rsc->stencil;
209 		format = rsc->base.format;
210 	}
211 
212 	so->base = *cso;
213 	pipe_reference(NULL, &prsc->reference);
214 	so->base.texture = prsc;
215 	so->base.reference.count = 1;
216 	so->base.context = pctx;
217 
218 	so->texconst0 =
219 		A5XX_TEX_CONST_0_FMT(fd5_pipe2tex(format)) |
220 		fd5_tex_swiz(format, cso->swizzle_r, cso->swizzle_g,
221 				cso->swizzle_b, cso->swizzle_a);
222 
223 	/* NOTE: since we sample z24s8 using 8888_UINT format, the swizzle
224 	 * we get isn't quite right.  Use SWAP(XYZW) as a cheap and cheerful
225 	 * way to re-arrange things so stencil component is where the swiz
226 	 * expects.
227 	 *
228 	 * Note that gallium expects stencil sampler to return (s,s,s,s)
229 	 * which isn't quite true.  To make that happen we'd have to massage
230 	 * the swizzle.  But in practice only the .x component is used.
231 	 */
232 	if (format == PIPE_FORMAT_X24S8_UINT) {
233 		so->texconst0 |= A5XX_TEX_CONST_0_SWAP(XYZW);
234 	}
235 
236 	if (util_format_is_srgb(format)) {
237 		if (use_astc_srgb_workaround(pctx, format))
238 			so->astc_srgb = true;
239 		so->texconst0 |= A5XX_TEX_CONST_0_SRGB;
240 	}
241 
242 	if (cso->target == PIPE_BUFFER) {
243 		unsigned elements = cso->u.buf.size / util_format_get_blocksize(format);
244 
245 		lvl = 0;
246 		so->texconst1 =
247 			A5XX_TEX_CONST_1_WIDTH(elements) |
248 			A5XX_TEX_CONST_1_HEIGHT(1);
249 		so->texconst2 =
250 			A5XX_TEX_CONST_2_FETCHSIZE(fd5_pipe2fetchsize(format)) |
251 			A5XX_TEX_CONST_2_PITCH(elements * rsc->cpp);
252 		so->offset = cso->u.buf.offset;
253 	} else {
254 		unsigned miplevels;
255 
256 		lvl = fd_sampler_first_level(cso);
257 		miplevels = fd_sampler_last_level(cso) - lvl;
258 		layers = cso->u.tex.last_layer - cso->u.tex.first_layer + 1;
259 
260 		so->texconst0 |= A5XX_TEX_CONST_0_MIPLVLS(miplevels);
261 		so->texconst1 =
262 			A5XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) |
263 			A5XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));
264 		so->texconst2 =
265 			A5XX_TEX_CONST_2_FETCHSIZE(fd5_pipe2fetchsize(format)) |
266 			A5XX_TEX_CONST_2_PITCH(
267 					util_format_get_nblocksx(
268 							format, rsc->slices[lvl].pitch) * rsc->cpp);
269 		so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer);
270 	}
271 
272 	so->texconst2 |= A5XX_TEX_CONST_2_TYPE(fd5_tex_type(cso->target));
273 
274 	switch (cso->target) {
275 	case PIPE_TEXTURE_RECT:
276 	case PIPE_TEXTURE_1D:
277 	case PIPE_TEXTURE_2D:
278 		so->texconst3 =
279 			A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layer_size);
280 		so->texconst5 =
281 			A5XX_TEX_CONST_5_DEPTH(1);
282 		break;
283 	case PIPE_TEXTURE_1D_ARRAY:
284 	case PIPE_TEXTURE_2D_ARRAY:
285 		so->texconst3 =
286 			A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layer_size);
287 		so->texconst5 =
288 			A5XX_TEX_CONST_5_DEPTH(layers);
289 		break;
290 	case PIPE_TEXTURE_CUBE:
291 	case PIPE_TEXTURE_CUBE_ARRAY:
292 		so->texconst3 =
293 			A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layer_size);
294 		so->texconst5 =
295 			A5XX_TEX_CONST_5_DEPTH(layers / 6);
296 		break;
297 	case PIPE_TEXTURE_3D:
298 		so->texconst3 =
299 			A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->slices[lvl].size0);
300 		so->texconst5 =
301 			A5XX_TEX_CONST_5_DEPTH(u_minify(prsc->depth0, lvl));
302 		break;
303 	default:
304 		so->texconst3 = 0x00000000;
305 		break;
306 	}
307 
308 	return &so->base;
309 }
310 
311 static void
fd5_set_sampler_views(struct pipe_context * pctx,enum pipe_shader_type shader,unsigned start,unsigned nr,struct pipe_sampler_view ** views)312 fd5_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
313 		unsigned start, unsigned nr,
314 		struct pipe_sampler_view **views)
315 {
316 	struct fd_context *ctx = fd_context(pctx);
317 	struct fd5_context *fd5_ctx = fd5_context(ctx);
318 	uint16_t astc_srgb = 0;
319 	unsigned i;
320 
321 	for (i = 0; i < nr; i++) {
322 		if (views[i]) {
323 			struct fd5_pipe_sampler_view *view =
324 					fd5_pipe_sampler_view(views[i]);
325 			if (view->astc_srgb)
326 				astc_srgb |= (1 << i);
327 		}
328 	}
329 
330 	fd_set_sampler_views(pctx, shader, start, nr, views);
331 
332 	if (shader == PIPE_SHADER_FRAGMENT) {
333 		fd5_ctx->fastc_srgb = astc_srgb;
334 	} else if (shader == PIPE_SHADER_VERTEX) {
335 		fd5_ctx->vastc_srgb = astc_srgb;
336 	}
337 }
338 
339 void
fd5_texture_init(struct pipe_context * pctx)340 fd5_texture_init(struct pipe_context *pctx)
341 {
342 	pctx->create_sampler_state = fd5_sampler_state_create;
343 	pctx->bind_sampler_states = fd5_sampler_states_bind;
344 	pctx->create_sampler_view = fd5_sampler_view_create;
345 	pctx->set_sampler_views = fd5_set_sampler_views;
346 }
347