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1 // Copyright 2015, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 //   * Redistributions of source code must retain the above copyright notice,
8 //     this list of conditions and the following disclaimer.
9 //   * Redistributions in binary form must reproduce the above copyright notice,
10 //     this list of conditions and the following disclaimer in the documentation
11 //     and/or other materials provided with the distribution.
12 //   * Neither the name of ARM Limited nor the names of its contributors may be
13 //     used to endorse or promote products derived from this software without
14 //     specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 
27 
28 // ---------------------------------------------------------------------
29 // This file is auto generated using tools/generate_simulator_traces.py.
30 //
31 // PLEASE DO NOT EDIT.
32 // ---------------------------------------------------------------------
33 
34 #ifndef VIXL_ASSEMBLER_COND_RDLOW_RNLOW_RMLOW_MULS_T32_H_
35 #define VIXL_ASSEMBLER_COND_RDLOW_RNLOW_RMLOW_MULS_T32_H_
36 
37 const byte kInstruction_muls_al_r0_r0_r0[] = {
38   0x40, 0x43 // muls al r0 r0 r0
39 };
40 const byte kInstruction_muls_al_r0_r1_r0[] = {
41   0x48, 0x43 // muls al r0 r1 r0
42 };
43 const byte kInstruction_muls_al_r0_r2_r0[] = {
44   0x50, 0x43 // muls al r0 r2 r0
45 };
46 const byte kInstruction_muls_al_r0_r3_r0[] = {
47   0x58, 0x43 // muls al r0 r3 r0
48 };
49 const byte kInstruction_muls_al_r0_r4_r0[] = {
50   0x60, 0x43 // muls al r0 r4 r0
51 };
52 const byte kInstruction_muls_al_r0_r5_r0[] = {
53   0x68, 0x43 // muls al r0 r5 r0
54 };
55 const byte kInstruction_muls_al_r0_r6_r0[] = {
56   0x70, 0x43 // muls al r0 r6 r0
57 };
58 const byte kInstruction_muls_al_r0_r7_r0[] = {
59   0x78, 0x43 // muls al r0 r7 r0
60 };
61 const byte kInstruction_muls_al_r1_r0_r1[] = {
62   0x41, 0x43 // muls al r1 r0 r1
63 };
64 const byte kInstruction_muls_al_r1_r1_r1[] = {
65   0x49, 0x43 // muls al r1 r1 r1
66 };
67 const byte kInstruction_muls_al_r1_r2_r1[] = {
68   0x51, 0x43 // muls al r1 r2 r1
69 };
70 const byte kInstruction_muls_al_r1_r3_r1[] = {
71   0x59, 0x43 // muls al r1 r3 r1
72 };
73 const byte kInstruction_muls_al_r1_r4_r1[] = {
74   0x61, 0x43 // muls al r1 r4 r1
75 };
76 const byte kInstruction_muls_al_r1_r5_r1[] = {
77   0x69, 0x43 // muls al r1 r5 r1
78 };
79 const byte kInstruction_muls_al_r1_r6_r1[] = {
80   0x71, 0x43 // muls al r1 r6 r1
81 };
82 const byte kInstruction_muls_al_r1_r7_r1[] = {
83   0x79, 0x43 // muls al r1 r7 r1
84 };
85 const byte kInstruction_muls_al_r2_r0_r2[] = {
86   0x42, 0x43 // muls al r2 r0 r2
87 };
88 const byte kInstruction_muls_al_r2_r1_r2[] = {
89   0x4a, 0x43 // muls al r2 r1 r2
90 };
91 const byte kInstruction_muls_al_r2_r2_r2[] = {
92   0x52, 0x43 // muls al r2 r2 r2
93 };
94 const byte kInstruction_muls_al_r2_r3_r2[] = {
95   0x5a, 0x43 // muls al r2 r3 r2
96 };
97 const byte kInstruction_muls_al_r2_r4_r2[] = {
98   0x62, 0x43 // muls al r2 r4 r2
99 };
100 const byte kInstruction_muls_al_r2_r5_r2[] = {
101   0x6a, 0x43 // muls al r2 r5 r2
102 };
103 const byte kInstruction_muls_al_r2_r6_r2[] = {
104   0x72, 0x43 // muls al r2 r6 r2
105 };
106 const byte kInstruction_muls_al_r2_r7_r2[] = {
107   0x7a, 0x43 // muls al r2 r7 r2
108 };
109 const byte kInstruction_muls_al_r3_r0_r3[] = {
110   0x43, 0x43 // muls al r3 r0 r3
111 };
112 const byte kInstruction_muls_al_r3_r1_r3[] = {
113   0x4b, 0x43 // muls al r3 r1 r3
114 };
115 const byte kInstruction_muls_al_r3_r2_r3[] = {
116   0x53, 0x43 // muls al r3 r2 r3
117 };
118 const byte kInstruction_muls_al_r3_r3_r3[] = {
119   0x5b, 0x43 // muls al r3 r3 r3
120 };
121 const byte kInstruction_muls_al_r3_r4_r3[] = {
122   0x63, 0x43 // muls al r3 r4 r3
123 };
124 const byte kInstruction_muls_al_r3_r5_r3[] = {
125   0x6b, 0x43 // muls al r3 r5 r3
126 };
127 const byte kInstruction_muls_al_r3_r6_r3[] = {
128   0x73, 0x43 // muls al r3 r6 r3
129 };
130 const byte kInstruction_muls_al_r3_r7_r3[] = {
131   0x7b, 0x43 // muls al r3 r7 r3
132 };
133 const byte kInstruction_muls_al_r4_r0_r4[] = {
134   0x44, 0x43 // muls al r4 r0 r4
135 };
136 const byte kInstruction_muls_al_r4_r1_r4[] = {
137   0x4c, 0x43 // muls al r4 r1 r4
138 };
139 const byte kInstruction_muls_al_r4_r2_r4[] = {
140   0x54, 0x43 // muls al r4 r2 r4
141 };
142 const byte kInstruction_muls_al_r4_r3_r4[] = {
143   0x5c, 0x43 // muls al r4 r3 r4
144 };
145 const byte kInstruction_muls_al_r4_r4_r4[] = {
146   0x64, 0x43 // muls al r4 r4 r4
147 };
148 const byte kInstruction_muls_al_r4_r5_r4[] = {
149   0x6c, 0x43 // muls al r4 r5 r4
150 };
151 const byte kInstruction_muls_al_r4_r6_r4[] = {
152   0x74, 0x43 // muls al r4 r6 r4
153 };
154 const byte kInstruction_muls_al_r4_r7_r4[] = {
155   0x7c, 0x43 // muls al r4 r7 r4
156 };
157 const byte kInstruction_muls_al_r5_r0_r5[] = {
158   0x45, 0x43 // muls al r5 r0 r5
159 };
160 const byte kInstruction_muls_al_r5_r1_r5[] = {
161   0x4d, 0x43 // muls al r5 r1 r5
162 };
163 const byte kInstruction_muls_al_r5_r2_r5[] = {
164   0x55, 0x43 // muls al r5 r2 r5
165 };
166 const byte kInstruction_muls_al_r5_r3_r5[] = {
167   0x5d, 0x43 // muls al r5 r3 r5
168 };
169 const byte kInstruction_muls_al_r5_r4_r5[] = {
170   0x65, 0x43 // muls al r5 r4 r5
171 };
172 const byte kInstruction_muls_al_r5_r5_r5[] = {
173   0x6d, 0x43 // muls al r5 r5 r5
174 };
175 const byte kInstruction_muls_al_r5_r6_r5[] = {
176   0x75, 0x43 // muls al r5 r6 r5
177 };
178 const byte kInstruction_muls_al_r5_r7_r5[] = {
179   0x7d, 0x43 // muls al r5 r7 r5
180 };
181 const byte kInstruction_muls_al_r6_r0_r6[] = {
182   0x46, 0x43 // muls al r6 r0 r6
183 };
184 const byte kInstruction_muls_al_r6_r1_r6[] = {
185   0x4e, 0x43 // muls al r6 r1 r6
186 };
187 const byte kInstruction_muls_al_r6_r2_r6[] = {
188   0x56, 0x43 // muls al r6 r2 r6
189 };
190 const byte kInstruction_muls_al_r6_r3_r6[] = {
191   0x5e, 0x43 // muls al r6 r3 r6
192 };
193 const byte kInstruction_muls_al_r6_r4_r6[] = {
194   0x66, 0x43 // muls al r6 r4 r6
195 };
196 const byte kInstruction_muls_al_r6_r5_r6[] = {
197   0x6e, 0x43 // muls al r6 r5 r6
198 };
199 const byte kInstruction_muls_al_r6_r6_r6[] = {
200   0x76, 0x43 // muls al r6 r6 r6
201 };
202 const byte kInstruction_muls_al_r6_r7_r6[] = {
203   0x7e, 0x43 // muls al r6 r7 r6
204 };
205 const byte kInstruction_muls_al_r7_r0_r7[] = {
206   0x47, 0x43 // muls al r7 r0 r7
207 };
208 const byte kInstruction_muls_al_r7_r1_r7[] = {
209   0x4f, 0x43 // muls al r7 r1 r7
210 };
211 const byte kInstruction_muls_al_r7_r2_r7[] = {
212   0x57, 0x43 // muls al r7 r2 r7
213 };
214 const byte kInstruction_muls_al_r7_r3_r7[] = {
215   0x5f, 0x43 // muls al r7 r3 r7
216 };
217 const byte kInstruction_muls_al_r7_r4_r7[] = {
218   0x67, 0x43 // muls al r7 r4 r7
219 };
220 const byte kInstruction_muls_al_r7_r5_r7[] = {
221   0x6f, 0x43 // muls al r7 r5 r7
222 };
223 const byte kInstruction_muls_al_r7_r6_r7[] = {
224   0x77, 0x43 // muls al r7 r6 r7
225 };
226 const byte kInstruction_muls_al_r7_r7_r7[] = {
227   0x7f, 0x43 // muls al r7 r7 r7
228 };
229 const TestResult kReferencemuls[] = {
230   {
231     ARRAY_SIZE(kInstruction_muls_al_r0_r0_r0),
232     kInstruction_muls_al_r0_r0_r0,
233   },
234   {
235     ARRAY_SIZE(kInstruction_muls_al_r0_r1_r0),
236     kInstruction_muls_al_r0_r1_r0,
237   },
238   {
239     ARRAY_SIZE(kInstruction_muls_al_r0_r2_r0),
240     kInstruction_muls_al_r0_r2_r0,
241   },
242   {
243     ARRAY_SIZE(kInstruction_muls_al_r0_r3_r0),
244     kInstruction_muls_al_r0_r3_r0,
245   },
246   {
247     ARRAY_SIZE(kInstruction_muls_al_r0_r4_r0),
248     kInstruction_muls_al_r0_r4_r0,
249   },
250   {
251     ARRAY_SIZE(kInstruction_muls_al_r0_r5_r0),
252     kInstruction_muls_al_r0_r5_r0,
253   },
254   {
255     ARRAY_SIZE(kInstruction_muls_al_r0_r6_r0),
256     kInstruction_muls_al_r0_r6_r0,
257   },
258   {
259     ARRAY_SIZE(kInstruction_muls_al_r0_r7_r0),
260     kInstruction_muls_al_r0_r7_r0,
261   },
262   {
263     ARRAY_SIZE(kInstruction_muls_al_r1_r0_r1),
264     kInstruction_muls_al_r1_r0_r1,
265   },
266   {
267     ARRAY_SIZE(kInstruction_muls_al_r1_r1_r1),
268     kInstruction_muls_al_r1_r1_r1,
269   },
270   {
271     ARRAY_SIZE(kInstruction_muls_al_r1_r2_r1),
272     kInstruction_muls_al_r1_r2_r1,
273   },
274   {
275     ARRAY_SIZE(kInstruction_muls_al_r1_r3_r1),
276     kInstruction_muls_al_r1_r3_r1,
277   },
278   {
279     ARRAY_SIZE(kInstruction_muls_al_r1_r4_r1),
280     kInstruction_muls_al_r1_r4_r1,
281   },
282   {
283     ARRAY_SIZE(kInstruction_muls_al_r1_r5_r1),
284     kInstruction_muls_al_r1_r5_r1,
285   },
286   {
287     ARRAY_SIZE(kInstruction_muls_al_r1_r6_r1),
288     kInstruction_muls_al_r1_r6_r1,
289   },
290   {
291     ARRAY_SIZE(kInstruction_muls_al_r1_r7_r1),
292     kInstruction_muls_al_r1_r7_r1,
293   },
294   {
295     ARRAY_SIZE(kInstruction_muls_al_r2_r0_r2),
296     kInstruction_muls_al_r2_r0_r2,
297   },
298   {
299     ARRAY_SIZE(kInstruction_muls_al_r2_r1_r2),
300     kInstruction_muls_al_r2_r1_r2,
301   },
302   {
303     ARRAY_SIZE(kInstruction_muls_al_r2_r2_r2),
304     kInstruction_muls_al_r2_r2_r2,
305   },
306   {
307     ARRAY_SIZE(kInstruction_muls_al_r2_r3_r2),
308     kInstruction_muls_al_r2_r3_r2,
309   },
310   {
311     ARRAY_SIZE(kInstruction_muls_al_r2_r4_r2),
312     kInstruction_muls_al_r2_r4_r2,
313   },
314   {
315     ARRAY_SIZE(kInstruction_muls_al_r2_r5_r2),
316     kInstruction_muls_al_r2_r5_r2,
317   },
318   {
319     ARRAY_SIZE(kInstruction_muls_al_r2_r6_r2),
320     kInstruction_muls_al_r2_r6_r2,
321   },
322   {
323     ARRAY_SIZE(kInstruction_muls_al_r2_r7_r2),
324     kInstruction_muls_al_r2_r7_r2,
325   },
326   {
327     ARRAY_SIZE(kInstruction_muls_al_r3_r0_r3),
328     kInstruction_muls_al_r3_r0_r3,
329   },
330   {
331     ARRAY_SIZE(kInstruction_muls_al_r3_r1_r3),
332     kInstruction_muls_al_r3_r1_r3,
333   },
334   {
335     ARRAY_SIZE(kInstruction_muls_al_r3_r2_r3),
336     kInstruction_muls_al_r3_r2_r3,
337   },
338   {
339     ARRAY_SIZE(kInstruction_muls_al_r3_r3_r3),
340     kInstruction_muls_al_r3_r3_r3,
341   },
342   {
343     ARRAY_SIZE(kInstruction_muls_al_r3_r4_r3),
344     kInstruction_muls_al_r3_r4_r3,
345   },
346   {
347     ARRAY_SIZE(kInstruction_muls_al_r3_r5_r3),
348     kInstruction_muls_al_r3_r5_r3,
349   },
350   {
351     ARRAY_SIZE(kInstruction_muls_al_r3_r6_r3),
352     kInstruction_muls_al_r3_r6_r3,
353   },
354   {
355     ARRAY_SIZE(kInstruction_muls_al_r3_r7_r3),
356     kInstruction_muls_al_r3_r7_r3,
357   },
358   {
359     ARRAY_SIZE(kInstruction_muls_al_r4_r0_r4),
360     kInstruction_muls_al_r4_r0_r4,
361   },
362   {
363     ARRAY_SIZE(kInstruction_muls_al_r4_r1_r4),
364     kInstruction_muls_al_r4_r1_r4,
365   },
366   {
367     ARRAY_SIZE(kInstruction_muls_al_r4_r2_r4),
368     kInstruction_muls_al_r4_r2_r4,
369   },
370   {
371     ARRAY_SIZE(kInstruction_muls_al_r4_r3_r4),
372     kInstruction_muls_al_r4_r3_r4,
373   },
374   {
375     ARRAY_SIZE(kInstruction_muls_al_r4_r4_r4),
376     kInstruction_muls_al_r4_r4_r4,
377   },
378   {
379     ARRAY_SIZE(kInstruction_muls_al_r4_r5_r4),
380     kInstruction_muls_al_r4_r5_r4,
381   },
382   {
383     ARRAY_SIZE(kInstruction_muls_al_r4_r6_r4),
384     kInstruction_muls_al_r4_r6_r4,
385   },
386   {
387     ARRAY_SIZE(kInstruction_muls_al_r4_r7_r4),
388     kInstruction_muls_al_r4_r7_r4,
389   },
390   {
391     ARRAY_SIZE(kInstruction_muls_al_r5_r0_r5),
392     kInstruction_muls_al_r5_r0_r5,
393   },
394   {
395     ARRAY_SIZE(kInstruction_muls_al_r5_r1_r5),
396     kInstruction_muls_al_r5_r1_r5,
397   },
398   {
399     ARRAY_SIZE(kInstruction_muls_al_r5_r2_r5),
400     kInstruction_muls_al_r5_r2_r5,
401   },
402   {
403     ARRAY_SIZE(kInstruction_muls_al_r5_r3_r5),
404     kInstruction_muls_al_r5_r3_r5,
405   },
406   {
407     ARRAY_SIZE(kInstruction_muls_al_r5_r4_r5),
408     kInstruction_muls_al_r5_r4_r5,
409   },
410   {
411     ARRAY_SIZE(kInstruction_muls_al_r5_r5_r5),
412     kInstruction_muls_al_r5_r5_r5,
413   },
414   {
415     ARRAY_SIZE(kInstruction_muls_al_r5_r6_r5),
416     kInstruction_muls_al_r5_r6_r5,
417   },
418   {
419     ARRAY_SIZE(kInstruction_muls_al_r5_r7_r5),
420     kInstruction_muls_al_r5_r7_r5,
421   },
422   {
423     ARRAY_SIZE(kInstruction_muls_al_r6_r0_r6),
424     kInstruction_muls_al_r6_r0_r6,
425   },
426   {
427     ARRAY_SIZE(kInstruction_muls_al_r6_r1_r6),
428     kInstruction_muls_al_r6_r1_r6,
429   },
430   {
431     ARRAY_SIZE(kInstruction_muls_al_r6_r2_r6),
432     kInstruction_muls_al_r6_r2_r6,
433   },
434   {
435     ARRAY_SIZE(kInstruction_muls_al_r6_r3_r6),
436     kInstruction_muls_al_r6_r3_r6,
437   },
438   {
439     ARRAY_SIZE(kInstruction_muls_al_r6_r4_r6),
440     kInstruction_muls_al_r6_r4_r6,
441   },
442   {
443     ARRAY_SIZE(kInstruction_muls_al_r6_r5_r6),
444     kInstruction_muls_al_r6_r5_r6,
445   },
446   {
447     ARRAY_SIZE(kInstruction_muls_al_r6_r6_r6),
448     kInstruction_muls_al_r6_r6_r6,
449   },
450   {
451     ARRAY_SIZE(kInstruction_muls_al_r6_r7_r6),
452     kInstruction_muls_al_r6_r7_r6,
453   },
454   {
455     ARRAY_SIZE(kInstruction_muls_al_r7_r0_r7),
456     kInstruction_muls_al_r7_r0_r7,
457   },
458   {
459     ARRAY_SIZE(kInstruction_muls_al_r7_r1_r7),
460     kInstruction_muls_al_r7_r1_r7,
461   },
462   {
463     ARRAY_SIZE(kInstruction_muls_al_r7_r2_r7),
464     kInstruction_muls_al_r7_r2_r7,
465   },
466   {
467     ARRAY_SIZE(kInstruction_muls_al_r7_r3_r7),
468     kInstruction_muls_al_r7_r3_r7,
469   },
470   {
471     ARRAY_SIZE(kInstruction_muls_al_r7_r4_r7),
472     kInstruction_muls_al_r7_r4_r7,
473   },
474   {
475     ARRAY_SIZE(kInstruction_muls_al_r7_r5_r7),
476     kInstruction_muls_al_r7_r5_r7,
477   },
478   {
479     ARRAY_SIZE(kInstruction_muls_al_r7_r6_r7),
480     kInstruction_muls_al_r7_r6_r7,
481   },
482   {
483     ARRAY_SIZE(kInstruction_muls_al_r7_r7_r7),
484     kInstruction_muls_al_r7_r7_r7,
485   },
486 };
487 
488 #endif  // VIXL_ASSEMBLER_COND_RDLOW_RNLOW_RMLOW_MULS_T32_H_
489