1/* 2 * Support for CompuLab CL-SOM-AM57x System-on-Module 3 * 4 * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/ 5 * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published by 9 * the Free Software Foundation. 10 */ 11 12/dts-v1/; 13 14#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/interrupt-controller/irq.h> 16#include "dra74x.dtsi" 17 18/ { 19 model = "CompuLab CL-SOM-AM57x"; 20 compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; 21 22 memory@0 { 23 device_type = "memory"; 24 reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */ 25 }; 26 27 leds { 28 compatible = "gpio-leds"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&leds_pins_default>; 31 32 led0 { 33 label = "cl-som-am57x:green"; 34 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; 35 linux,default-trigger = "heartbeat"; 36 default-state = "off"; 37 }; 38 }; 39 40 vdd_3v3: fixedregulator-vdd_3v3 { 41 compatible = "regulator-fixed"; 42 regulator-name = "vdd_3v3"; 43 regulator-min-microvolt = <3300000>; 44 regulator-max-microvolt = <3300000>; 45 }; 46 47 ads7846reg: fixedregulator-ads7846-reg { 48 compatible = "regulator-fixed"; 49 regulator-name = "ads7846-reg"; 50 regulator-min-microvolt = <3300000>; 51 regulator-max-microvolt = <3300000>; 52 }; 53 54 sound0: sound0 { 55 compatible = "simple-audio-card"; 56 simple-audio-card,name = "CL-SOM-AM57x-Sound-Card"; 57 simple-audio-card,format = "i2s"; 58 simple-audio-card,bitclock-master = <&dailink0_master>; 59 simple-audio-card,frame-master = <&dailink0_master>; 60 simple-audio-card,widgets = 61 "Headphone", "Headphone Jack", 62 "Microphone", "Microphone Jack", 63 "Line", "Line Jack"; 64 simple-audio-card,routing = 65 "Headphone Jack", "RHPOUT", 66 "Headphone Jack", "LHPOUT", 67 "LLINEIN", "Line Jack", 68 "MICIN", "Mic Bias", 69 "Mic Bias", "Microphone Jack"; 70 71 dailink0_master: simple-audio-card,cpu { 72 sound-dai = <&mcasp3>; 73 }; 74 75 simple-audio-card,codec { 76 sound-dai = <&wm8731>; 77 system-clock-frequency = <12000000>; 78 }; 79 }; 80}; 81 82&dra7_pmx_core { 83 leds_pins_default: leds_pins_default { 84 pinctrl-single,pins = < 85 DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */ 86 >; 87 }; 88 89 i2c1_pins_default: i2c1_pins_default { 90 pinctrl-single,pins = < 91 DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ 92 DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ 93 >; 94 }; 95 96 i2c3_pins_default: i2c3_pins_default { 97 pinctrl-single,pins = < 98 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */ 99 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */ 100 >; 101 }; 102 103 i2c4_pins_default: i2c4_pins_default { 104 pinctrl-single,pins = < 105 DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */ 106 DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */ 107 >; 108 }; 109 110 tps659038_pins_default: tps659038_pins_default { 111 pinctrl-single,pins = < 112 DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ 113 >; 114 }; 115 116 mmc2_pins_default: mmc2_pins_default { 117 pinctrl-single,pins = < 118 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 119 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 120 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 121 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 122 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 123 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 124 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 125 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 126 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 127 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 128 >; 129 }; 130 131 qspi1_pins: pinmux_qspi1_pins { 132 pinctrl-single,pins = < 133 DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ 134 DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d0 */ 135 DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d1 */ 136 DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ 137 DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ 138 DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ 139 >; 140 }; 141 142 cpsw_pins_default: cpsw_pins_default { 143 pinctrl-single,pins = < 144 /* Slave at addr 0x0 */ 145 DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tclk */ 146 DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tctl */ 147 DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3 */ 148 DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td2 */ 149 DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td1 */ 150 DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td0 */ 151 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */ 152 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */ 153 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */ 154 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */ 155 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */ 156 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */ 157 158 /* Slave at addr 0x1 */ 159 DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_tclk */ 160 DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */ 161 DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */ 162 DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */ 163 DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */ 164 DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */ 165 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */ 166 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */ 167 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ 168 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ 169 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ 170 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 171 >; 172 }; 173 174 cpsw_pins_sleep: cpsw_pins_sleep { 175 pinctrl-single,pins = < 176 /* Slave 1 */ 177 DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15) 178 DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15) 179 DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15) 180 DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15) 181 DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15) 182 DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15) 183 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15) 184 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15) 185 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15) 186 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15) 187 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15) 188 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15) 189 190 /* Slave 2 */ 191 DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15) 192 DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15) 193 DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15) 194 DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15) 195 DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15) 196 DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15) 197 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15) 198 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15) 199 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15) 200 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15) 201 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15) 202 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15) 203 >; 204 }; 205 206 davinci_mdio_pins_default: davinci_mdio_pins_default { 207 pinctrl-single,pins = < 208 /* MDIO */ 209 DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */ 210 DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */ 211 >; 212 }; 213 214 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep { 215 pinctrl-single,pins = < 216 DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15) 217 DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15) 218 >; 219 }; 220 221 ads7846_pins: pinmux_ads7846_pins { 222 pinctrl-single,pins = < 223 DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */ 224 >; 225 }; 226 227 mcasp3_pins_default: mcasp3_pins_default { 228 pinctrl-single,pins = < 229 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */ 230 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */ 231 DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */ 232 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */ 233 >; 234 }; 235 236 mcasp3_pins_sleep: mcasp3_pins_sleep { 237 pinctrl-single,pins = < 238 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15) 239 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15) 240 DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15) 241 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15) 242 >; 243 }; 244}; 245 246&i2c1 { 247 status = "okay"; 248 pinctrl-names = "default"; 249 pinctrl-0 = <&i2c1_pins_default>; 250 clock-frequency = <400000>; 251}; 252 253&i2c3 { 254 status = "okay"; 255 pinctrl-names = "default"; 256 pinctrl-0 = <&i2c3_pins_default>; 257 clock-frequency = <400000>; 258}; 259 260&i2c4 { 261 status = "okay"; 262 pinctrl-names = "default"; 263 pinctrl-0 = <&i2c4_pins_default>; 264 clock-frequency = <400000>; 265 266 tps659038: tps659038@58 { 267 compatible = "ti,tps659038"; 268 reg = <0x58>; 269 interrupt-parent = <&gpio1>; 270 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 271 272 pinctrl-names = "default"; 273 pinctrl-0 = <&tps659038_pins_default>; 274 275 #interrupt-cells = <2>; 276 interrupt-controller; 277 278 ti,system-power-controller; 279 280 tps659038_pmic { 281 compatible = "ti,tps659038-pmic"; 282 283 regulators { 284 smps12_reg: smps12 { 285 /* VDD_MPU */ 286 regulator-name = "smps12"; 287 regulator-min-microvolt = < 850000>; 288 regulator-max-microvolt = <1250000>; 289 regulator-always-on; 290 regulator-boot-on; 291 }; 292 293 smps3_reg: smps3 { 294 /* VDD_DDR */ 295 regulator-name = "smps3"; 296 regulator-min-microvolt = <1500000>; 297 regulator-max-microvolt = <1500000>; 298 regulator-always-on; 299 regulator-boot-on; 300 }; 301 302 smps45_reg: smps45 { 303 /* VDD_DSPEVE */ 304 regulator-name = "smps45"; 305 regulator-min-microvolt = < 850000>; 306 regulator-max-microvolt = <1250000>; 307 regulator-always-on; 308 regulator-boot-on; 309 }; 310 311 smps6_reg: smps6 { 312 /* VDD_GPU */ 313 regulator-name = "smps6"; 314 regulator-min-microvolt = < 850000>; 315 regulator-max-microvolt = <1250000>; 316 regulator-always-on; 317 regulator-boot-on; 318 }; 319 320 smps7_reg: smps7 { 321 /* VDD_CORE */ 322 regulator-name = "smps7"; 323 regulator-min-microvolt = < 850000>; 324 regulator-max-microvolt = <1160000>; 325 regulator-always-on; 326 regulator-boot-on; 327 }; 328 329 smps8_reg: smps8 { 330 /* VDD_IVA */ 331 regulator-name = "smps8"; 332 regulator-min-microvolt = < 850000>; 333 regulator-max-microvolt = <1250000>; 334 regulator-always-on; 335 regulator-boot-on; 336 }; 337 338 smps9_reg: smps9 { 339 /* PMIC_3V3 */ 340 regulator-name = "smps9"; 341 regulator-min-microvolt = <3300000>; 342 regulator-max-microvolt = <3300000>; 343 regulator-always-on; 344 regulator-boot-on; 345 }; 346 347 348 ldo1_reg: ldo1 { 349 /* VDD_SD / VDDSHV8 */ 350 regulator-name = "ldo1"; 351 regulator-min-microvolt = <1800000>; 352 regulator-max-microvolt = <3300000>; 353 regulator-boot-on; 354 regulator-always-on; 355 }; 356 357 ldo2_reg: ldo2 { 358 /* VDD_1V8 */ 359 regulator-name = "ldo2"; 360 regulator-min-microvolt = <1800000>; 361 regulator-max-microvolt = <1800000>; 362 regulator-always-on; 363 regulator-boot-on; 364 }; 365 366 ldo3_reg: ldo3 { 367 /* VDDA_1V8_PHYA - supplies VDDA_SATA, VDDA_USB1/2/3 */ 368 regulator-name = "ldo3"; 369 regulator-min-microvolt = <1800000>; 370 regulator-max-microvolt = <1800000>; 371 regulator-always-on; 372 regulator-boot-on; 373 }; 374 375 ldo4_reg: ldo4 { 376 /* VDDA_1V8_PHYB - supplies VDDA_HDMI, VDDA_PCIE/0/1 */ 377 regulator-name = "ldo4"; 378 regulator-min-microvolt = <1800000>; 379 regulator-max-microvolt = <1800000>; 380 regulator-always-on; 381 regulator-boot-on; 382 }; 383 384 ldo9_reg: ldo9 { 385 /* VDD_RTC */ 386 regulator-name = "ldo9"; 387 regulator-min-microvolt = <1050000>; 388 regulator-max-microvolt = <1050000>; 389 regulator-always-on; 390 regulator-boot-on; 391 }; 392 393 ldoln_reg: ldoln { 394 /* VDDA_1V8_PLL */ 395 regulator-name = "ldoln"; 396 regulator-min-microvolt = <1800000>; 397 regulator-max-microvolt = <1800000>; 398 regulator-always-on; 399 regulator-boot-on; 400 }; 401 402 ldousb_reg: ldousb { 403 /* VDDA_3V_USB: VDDA_USBHS33 */ 404 regulator-name = "ldousb"; 405 regulator-min-microvolt = <3300000>; 406 regulator-max-microvolt = <3300000>; 407 regulator-always-on; 408 regulator-boot-on; 409 }; 410 411 /* regen1 not used */ 412 }; 413 }; 414 415 tps659038_pwr_button: tps659038_pwr_button { 416 compatible = "ti,palmas-pwrbutton"; 417 interrupt-parent = <&tps659038>; 418 interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 419 wakeup-source; 420 ti,palmas-long-press-seconds = <12>; 421 }; 422 423 tps659038_gpio: tps659038_gpio { 424 compatible = "ti,palmas-gpio"; 425 gpio-controller; 426 #gpio-cells = <2>; 427 }; 428 }; 429 430 rtc0: rtc@56 { 431 compatible = "emmicro,em3027"; 432 reg = <0x56>; 433 }; 434 435 eeprom_module: atmel@50 { 436 compatible = "atmel,24c08"; 437 reg = <0x50>; 438 pagesize = <16>; 439 }; 440 441 wm8731: wm8731@1a { 442 #sound-dai-cells = <0>; 443 compatible = "wlf,wm8731"; 444 reg = <0x1a>; 445 status = "okay"; 446 }; 447}; 448 449&cpu0 { 450 cpu0-supply = <&smps12_reg>; 451 voltage-tolerance = <1>; 452}; 453 454&sata { 455 status = "okay"; 456}; 457 458&mailbox5 { 459 status = "okay"; 460 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { 461 status = "okay"; 462 }; 463 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { 464 status = "okay"; 465 }; 466}; 467 468&mailbox6 { 469 status = "okay"; 470 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { 471 status = "okay"; 472 }; 473 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { 474 status = "okay"; 475 }; 476}; 477 478&mmc2 { 479 status = "okay"; 480 481 pinctrl-names = "default"; 482 pinctrl-0 = <&mmc2_pins_default>; 483 484 vmmc-supply = <&vdd_3v3>; 485 bus-width = <8>; 486 ti,non-removable; 487 cap-mmc-dual-data-rate; 488}; 489 490&qspi { 491 status = "okay"; 492 pinctrl-names = "default"; 493 pinctrl-0 = <&qspi1_pins>; 494 495 spi-max-frequency = <48000000>; 496 497 spi_flash: spi_flash@0 { 498 #address-cells = <1>; 499 #size-cells = <1>; 500 compatible = "spansion,m25p80", "jedec,spi-nor"; 501 reg = <0>; /* CS0 */ 502 spi-max-frequency = <48000000>; 503 504 partition@0 { 505 label = "uboot"; 506 reg = <0x0 0xc0000>; 507 }; 508 509 partition@c0000 { 510 label = "uboot environment"; 511 reg = <0xc0000 0x40000>; 512 }; 513 514 partition@100000 { 515 label = "reserved"; 516 reg = <0x100000 0x0>; 517 }; 518 }; 519 520 /* touch controller */ 521 ads7846@0 { 522 pinctrl-names = "default"; 523 pinctrl-0 = <&ads7846_pins>; 524 525 compatible = "ti,ads7846"; 526 vcc-supply = <&ads7846reg>; 527 528 reg = <1>; /* CS1 */ 529 spi-max-frequency = <1500000>; 530 531 interrupt-parent = <&gpio1>; 532 interrupts = <31 0>; 533 pendown-gpio = <&gpio1 31 0>; 534 535 536 ti,x-min = /bits/ 16 <0x0>; 537 ti,x-max = /bits/ 16 <0x0fff>; 538 ti,y-min = /bits/ 16 <0x0>; 539 ti,y-max = /bits/ 16 <0x0fff>; 540 541 ti,x-plate-ohms = /bits/ 16 <180>; 542 ti,pressure-max = /bits/ 16 <255>; 543 544 ti,debounce-max = /bits/ 16 <30>; 545 ti,debounce-tol = /bits/ 16 <10>; 546 ti,debounce-rep = /bits/ 16 <1>; 547 548 wakeup-source; 549 }; 550}; 551 552&mac { 553 status = "okay"; 554 pinctrl-names = "default", "sleep"; 555 pinctrl-0 = <&cpsw_pins_default>; 556 pinctrl-1 = <&cpsw_pins_sleep>; 557 dual_emac; 558}; 559 560&cpsw_emac0 { 561 phy_id = <&davinci_mdio>, <0>; 562 phy-mode = "rgmii-txid"; 563 dual_emac_res_vlan = <0>; 564}; 565 566&cpsw_emac1 { 567 phy_id = <&davinci_mdio>, <1>; 568 phy-mode = "rgmii-txid"; 569 dual_emac_res_vlan = <1>; 570}; 571 572&davinci_mdio { 573 pinctrl-names = "default", "sleep"; 574 pinctrl-0 = <&davinci_mdio_pins_default>; 575 pinctrl-1 = <&davinci_mdio_pins_sleep>; 576}; 577 578&usb2_phy1 { 579 phy-supply = <&ldousb_reg>; 580}; 581 582&usb2_phy2 { 583 phy-supply = <&ldousb_reg>; 584}; 585 586&usb1 { 587 dr_mode = "host"; 588}; 589 590&usb2 { 591 dr_mode = "host"; 592}; 593 594&mcasp3 { 595 #sound-dai-cells = <0>; 596 pinctrl-names = "default", "sleep"; 597 pinctrl-0 = <&mcasp3_pins_default>; 598 pinctrl-1 = <&mcasp3_pins_sleep>; 599 status = "okay"; 600 601 op-mode = <0>; /* MCASP_IIS_MODE */ 602 tdm-slots = <2>; 603 /* 4 serializers */ 604 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 605 1 2 0 0 606 >; 607}; 608 609&gpio3 { 610 status = "okay"; 611 ti,no-reset-on-init; 612}; 613 614&gpio2 { 615 status = "okay"; 616 ti,no-reset-on-init; 617}; 618