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1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2014 - 2015 Markus Niebel <Markus.Niebel@tq-group.com>
4 *
5 * Refer doc/README.imximage for more details about how-to configure
6 * and create imximage boot image
7 *
8 * The syntax is taken as close as possible with the kwbimage
9 */
10
11/* image version */
12IMAGE_VERSION 2
13
14#define __ASSEMBLY__
15#include <config.h>
16
17/*
18 * Boot Device : one of
19 * spi, sd (the board has no nand neither onenand)
20 */
21#if defined(CONFIG_TQMA6X_MMC_BOOT)
22BOOT_FROM      sd
23#elif defined(CONFIG_TQMA6X_SPI_BOOT)
24BOOT_FROM      spi
25#endif
26
27#include "asm/arch/mx6-ddr.h"
28#include "asm/arch/iomux.h"
29#include "asm/arch/crm_regs.h"
30
31/* TQMa6DL DDR config Rev. 0100E */
32/* IOMUX configuration */
33DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
34DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
35DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00008030
36DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030
37DATA 4, MX6_IOM_DRAM_CAS, 0x00008030
38DATA 4, MX6_IOM_DRAM_RAS, 0x00008030
39DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
40DATA 4, MX6_IOM_DRAM_RESET, 0x000C3030
41DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
42DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000
43DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
44DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030
45DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030
46DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030
47DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
48DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030
49DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030
50DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030
51DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030
52DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030
53DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
54DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030
55DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030
56DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
57DATA 4, MX6_IOM_GRP_B0DS, 0x00000030
58DATA 4, MX6_IOM_GRP_B1DS, 0x00000030
59DATA 4, MX6_IOM_GRP_B2DS, 0x00000030
60DATA 4, MX6_IOM_GRP_B3DS, 0x00000030
61DATA 4, MX6_IOM_GRP_B4DS, 0x00000030
62DATA 4, MX6_IOM_GRP_B5DS, 0x00000030
63DATA 4, MX6_IOM_GRP_B6DS, 0x00000030
64DATA 4, MX6_IOM_GRP_B7DS, 0x00000030
65DATA 4, MX6_IOM_DRAM_DQM0, 0x00000030
66DATA 4, MX6_IOM_DRAM_DQM1, 0x00000030
67DATA 4, MX6_IOM_DRAM_DQM2, 0x00000030
68DATA 4, MX6_IOM_DRAM_DQM3, 0x00000030
69DATA 4, MX6_IOM_DRAM_DQM4, 0x00000030
70DATA 4, MX6_IOM_DRAM_DQM5, 0x00000030
71DATA 4, MX6_IOM_DRAM_DQM6, 0x00000030
72DATA 4, MX6_IOM_DRAM_DQM7, 0x00000030
73
74/* memory interface calibration values */
75DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
76DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
77DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00440048
78DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x003D003F
79DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0029002D
80DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x002B0043
81DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x424C0250
82DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x02300234
83DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4234023C
84DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x0224022C
85DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x48484C4C
86DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4C4E4E4C
87DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x36382C36
88DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x34343630
89DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
90DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
91DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
92DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
93DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
94DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
95DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
96DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
97DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
98DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
99
100/* configure memory interface */
101DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
102DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
103DATA 4, MX6_MMDC_P0_MDCFG0, 0x3F435333
104DATA 4, MX6_MMDC_P0_MDCFG1, 0xB68E8B63
105DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
106DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
107DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
108DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
109DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
110DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
111DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
112DATA 4, MX6_MMDC_P0_MDSCR, 0x00408032
113DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
114DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
115DATA 4, MX6_MMDC_P0_MDSCR, 0x05208030
116DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
117DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
118DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022222
119DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022222
120DATA 4, MX6_MMDC_P0_MDPDC, 0x0002552D
121DATA 4, MX6_MMDC_P0_MAPSR, 0x00001006
122DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
123
124#include "clocks.cfg"
125