1 /* Capstone Disassembler Engine */
2 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
3
4 #include <stdio.h>
5 #include <stdlib.h>
6
7 #include <capstone.h>
8
9 void print_string_hex(char *comment, unsigned char *str, size_t len);
10
print_insn_detail_arm64(csh handle,cs_insn * ins)11 void print_insn_detail_arm64(csh handle, cs_insn *ins)
12 {
13 cs_arm64 *arm64;
14 int i;
15
16 // detail can be NULL if SKIPDATA option is turned ON
17 if (ins->detail == NULL)
18 return;
19
20 arm64 = &(ins->detail->arm64);
21 if (arm64->op_count)
22 printf("\top_count: %u\n", arm64->op_count);
23
24 for (i = 0; i < arm64->op_count; i++) {
25 cs_arm64_op *op = &(arm64->operands[i]);
26 switch(op->type) {
27 default:
28 break;
29 case ARM64_OP_REG:
30 printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
31 break;
32 case ARM64_OP_IMM:
33 printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
34 break;
35 case ARM64_OP_FP:
36 #if defined(_KERNEL_MODE)
37 // Issue #681: Windows kernel does not support formatting float point
38 printf("\t\toperands[%u].type: FP = <float_point_unsupported>\n", i);
39 #else
40 printf("\t\toperands[%u].type: FP = %f\n", i, op->fp);
41 #endif
42 break;
43 case ARM64_OP_MEM:
44 printf("\t\toperands[%u].type: MEM\n", i);
45 if (op->mem.base != ARM64_REG_INVALID)
46 printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base));
47 if (op->mem.index != ARM64_REG_INVALID)
48 printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index));
49 if (op->mem.disp != 0)
50 printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
51
52 break;
53 case ARM64_OP_CIMM:
54 printf("\t\toperands[%u].type: C-IMM = %u\n", i, (int)op->imm);
55 break;
56 case ARM64_OP_REG_MRS:
57 printf("\t\toperands[%u].type: REG_MRS = 0x%x\n", i, op->reg);
58 break;
59 case ARM64_OP_REG_MSR:
60 printf("\t\toperands[%u].type: REG_MSR = 0x%x\n", i, op->reg);
61 break;
62 case ARM64_OP_PSTATE:
63 printf("\t\toperands[%u].type: PSTATE = 0x%x\n", i, op->pstate);
64 break;
65 case ARM64_OP_SYS:
66 printf("\t\toperands[%u].type: SYS = 0x%x\n", i, op->sys);
67 break;
68 case ARM64_OP_PREFETCH:
69 printf("\t\toperands[%u].type: PREFETCH = 0x%x\n", i, op->prefetch);
70 break;
71 case ARM64_OP_BARRIER:
72 printf("\t\toperands[%u].type: BARRIER = 0x%x\n", i, op->barrier);
73 break;
74 }
75
76 if (op->shift.type != ARM64_SFT_INVALID &&
77 op->shift.value)
78 printf("\t\t\tShift: type = %u, value = %u\n",
79 op->shift.type, op->shift.value);
80
81 if (op->ext != ARM64_EXT_INVALID)
82 printf("\t\t\tExt: %u\n", op->ext);
83
84 if (op->vas != ARM64_VAS_INVALID)
85 printf("\t\t\tVector Arrangement Specifier: 0x%x\n", op->vas);
86
87 if (op->vess != ARM64_VESS_INVALID)
88 printf("\t\t\tVector Element Size Specifier: %u\n", op->vess);
89
90 if (op->vector_index != -1)
91 printf("\t\t\tVector Index: %u\n", op->vector_index);
92 }
93
94 if (arm64->update_flags)
95 printf("\tUpdate-flags: True\n");
96
97 if (arm64->writeback)
98 printf("\tWrite-back: True\n");
99
100 if (arm64->cc)
101 printf("\tCode-condition: %u\n", arm64->cc);
102 }
103