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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) Marvell International Ltd. and its affiliates
4  */
5 
6 #ifndef _DDR3_TRAINING_HW_ALGO_H_
7 #define _DDR3_TRAINING_HW_ALGO_H_
8 
9 int ddr3_tip_vref(u32 dev_num);
10 int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id);
11 int ddr3_tip_cmd_addr_init_delay(u32 dev_num, u32 adll_tap);
12 
13 #endif /* _DDR3_TRAINING_HW_ALGO_H_ */
14