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1 /*******************************************************************************
2 * Copyright (C) 2018 Cadence Design Systems, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files (the
6 * "Software"), to use this Software with Cadence processor cores only and
7 * not with any other processors and platforms, subject to
8 * the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included
11 * in all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
15 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
16 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
17 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
18 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
19 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20 
21 ******************************************************************************/
22 
23 #ifndef __DSP_DRIVER_IPC_H__
24 #define __DSP_DRIVER_IPC_H__
25 
26 #if 0
27 #define DSP_IPC_FROM_AP_INT_NO     (3)
28 #define DSP_SYS_IPC_BASE_ADDR_NS   (0xe896b000)
29 #define DSP_AP_TO_DSP_MAILBOX_NO   (18)
30 #define DSP_DSP_TO_AP_MAILBOX_NO   (2)
31 #define IPC_BUSY_RETRY_COUNT       (1000)
32 #define IPC_ACPU_INT_SRC_HIFI_MSG  (1)
33 #define BIT_MASK(n) (1 << (n))
34 
35 #define WORD_REF(address) (* ((unsigned int volatile *) (address)))
36 
37 #define SYS_IPC_LOCK(base)                  WORD_REF(base + 0xA00)
38 #define SYS_IPC_ICLR(base, box)             WORD_REF(base + ((box) << 6) + 0x18)
39 #define SYS_IPC_DATA(base, box, num)        WORD_REF(base + ((box) << 6) + 0x20 + ((num) << 2))
40 #define SYS_IPC_CPUIRST(base, core)         WORD_REF(base + 0x804 + ((core) << 3))
41 #define SYS_IPC_MODE(base, box)             WORD_REF(base + ((box) << 6) + 0x10)
42 #define SYS_IPC_SOURCE(base, box)           WORD_REF(base + ((box) << 6))
43 #define SYS_IPC_DEST(base, box)             WORD_REF(base + ((box) * 64) + 0x04)
44 #define SYS_IPC_SEND(base, box)             WORD_REF(base + ((box) << 6) + 0x1c)
45 #define SYS_IPC_IMASK(base, box)            WORD_REF(base + ((box) << 6) + 0x14)
46 #define SYS_IPC_DCLR(base, box)             WORD_REF(base + ((box) * 64) + 0x08)
47 #define SYS_IPC_CPUIMST(base, core)         WORD_REF(base + 0x800 + ((core) * 8))
48 #define SYS_IPC_MODE_ACK     (7)
49 #define SYS_IPC_MODE_IDLE    (4)
50 #define SYS_IPC_MODE_AUTOACK (0)
51 
52 #define SYS_IPC_CORE_HIFI  (4)
53 #define SYS_IPC_CORE_A15   (0)
54 #define SYS_IPC_CORE_LPM3  (3)
55 #endif
56 #if 0
57 extern void dsp_ipc_init(void);
58 extern void dsp_ipc_wait(void);
59 #endif
60 #endif
61 
62