1; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck %s 2; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck %s 3; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck %s 4 5@lds0 = addrspace(3) global [512 x float] undef, align 4 6@lds1 = addrspace(3) global [256 x float] undef, align 4 7 8@large = addrspace(3) global [4096 x i32] undef, align 4 9 10; CHECK-LABEL: {{^}}groupstaticsize_test0: 11; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0x800{{$}} 12define amdgpu_kernel void @groupstaticsize_test0(float addrspace(1)* %out, i32 addrspace(1)* %lds_size) #0 { 13 %tid.x = tail call i32 @llvm.amdgcn.workitem.id.x() #1 14 %idx.0 = add nsw i32 %tid.x, 64 15 %static_lds_size = call i32 @llvm.amdgcn.groupstaticsize() #1 16 store i32 %static_lds_size, i32 addrspace(1)* %lds_size, align 4 17 %arrayidx0 = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds0, i32 0, i32 %idx.0 18 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 19 store float %val0, float addrspace(1)* %out, align 4 20 21 ret void 22} 23 24; CHECK-LABEL: {{^}}groupstaticsize_test1: 25; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0xc00{{$}} 26define amdgpu_kernel void @groupstaticsize_test1(float addrspace(1)* %out, i32 %cond, i32 addrspace(1)* %lds_size) { 27entry: 28 %static_lds_size = call i32 @llvm.amdgcn.groupstaticsize() #1 29 store i32 %static_lds_size, i32 addrspace(1)* %lds_size, align 4 30 %tid.x = tail call i32 @llvm.amdgcn.workitem.id.x() #1 31 %idx.0 = add nsw i32 %tid.x, 64 32 %tmp = icmp eq i32 %cond, 0 33 br i1 %tmp, label %if, label %else 34 35if: ; preds = %entry 36 %arrayidx0 = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds0, i32 0, i32 %idx.0 37 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 38 store float %val0, float addrspace(1)* %out, align 4 39 br label %endif 40 41else: ; preds = %entry 42 %arrayidx1 = getelementptr inbounds [256 x float], [256 x float] addrspace(3)* @lds1, i32 0, i32 %idx.0 43 %val1 = load float, float addrspace(3)* %arrayidx1, align 4 44 store float %val1, float addrspace(1)* %out, align 4 45 br label %endif 46 47endif: ; preds = %else, %if 48 ret void 49} 50 51; Exceeds 16-bit simm limit of s_movk_i32 52; CHECK-LABEL: {{^}}large_groupstaticsize: 53; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0x4000{{$}} 54define amdgpu_kernel void @large_groupstaticsize(i32 addrspace(1)* %size, i32 %idx) #0 { 55 %gep = getelementptr inbounds [4096 x i32], [4096 x i32] addrspace(3)* @large, i32 0, i32 %idx 56 store volatile i32 0, i32 addrspace(3)* %gep 57 %static_lds_size = call i32 @llvm.amdgcn.groupstaticsize() 58 store i32 %static_lds_size, i32 addrspace(1)* %size 59 ret void 60} 61 62declare i32 @llvm.amdgcn.groupstaticsize() #1 63declare i32 @llvm.amdgcn.workitem.id.x() #1 64 65attributes #0 = { nounwind } 66attributes #1 = { nounwind readnone } 67