1; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX906 2 3declare i32 @llvm.amdgcn.sdot2(<2 x i16> %a, <2 x i16> %b, i32 %c, i1 %clamp) 4 5; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot2_clamp 6; GFX906: v_dot2_i32_i16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}} 7define amdgpu_kernel void @test_llvm_amdgcn_sdot2_clamp( 8 i32 addrspace(1)* %r, 9 <2 x i16> addrspace(1)* %a, 10 <2 x i16> addrspace(1)* %b, 11 i32 addrspace(1)* %c) { 12entry: 13 %a.val = load <2 x i16>, <2 x i16> addrspace(1)* %a 14 %b.val = load <2 x i16>, <2 x i16> addrspace(1)* %b 15 %c.val = load i32, i32 addrspace(1)* %c 16 %r.val = call i32 @llvm.amdgcn.sdot2(<2 x i16> %a.val, <2 x i16> %b.val, i32 %c.val, i1 1) 17 store i32 %r.val, i32 addrspace(1)* %r 18 ret void 19} 20 21; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot2_no_clamp 22; GFX906: v_dot2_i32_i16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}} 23define amdgpu_kernel void @test_llvm_amdgcn_sdot2_no_clamp( 24 i32 addrspace(1)* %r, 25 <2 x i16> addrspace(1)* %a, 26 <2 x i16> addrspace(1)* %b, 27 i32 addrspace(1)* %c) { 28entry: 29 %a.val = load <2 x i16>, <2 x i16> addrspace(1)* %a 30 %b.val = load <2 x i16>, <2 x i16> addrspace(1)* %b 31 %c.val = load i32, i32 addrspace(1)* %c 32 %r.val = call i32 @llvm.amdgcn.sdot2(<2 x i16> %a.val, <2 x i16> %b.val, i32 %c.val, i1 0) 33 store i32 %r.val, i32 addrspace(1)* %r 34 ret void 35} 36