1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jason Ekstrand (jason@jlekstrand.net)
25 *
26 */
27
28 #include "nir.h"
29
30 struct locals_to_regs_state {
31 nir_shader *shader;
32 nir_function_impl *impl;
33
34 /* A hash table mapping derefs to registers */
35 struct hash_table *regs_table;
36
37 bool progress;
38 };
39
40 /* The following two functions implement a hash and equality check for
41 * variable dreferences. When the hash or equality function encounters an
42 * array, it ignores the offset and whether it is direct or indirect
43 * entirely.
44 */
45 static uint32_t
hash_deref(const void * void_deref)46 hash_deref(const void *void_deref)
47 {
48 uint32_t hash = _mesa_fnv32_1a_offset_bias;
49
50 const nir_deref_var *deref_var = void_deref;
51 hash = _mesa_fnv32_1a_accumulate(hash, deref_var->var);
52
53 for (const nir_deref *deref = deref_var->deref.child;
54 deref; deref = deref->child) {
55 if (deref->deref_type == nir_deref_type_struct) {
56 const nir_deref_struct *deref_struct = nir_deref_as_struct(deref);
57 hash = _mesa_fnv32_1a_accumulate(hash, deref_struct->index);
58 }
59 }
60
61 return hash;
62 }
63
64 static bool
derefs_equal(const void * void_a,const void * void_b)65 derefs_equal(const void *void_a, const void *void_b)
66 {
67 const nir_deref_var *a_var = void_a;
68 const nir_deref_var *b_var = void_b;
69
70 if (a_var->var != b_var->var)
71 return false;
72
73 for (const nir_deref *a = a_var->deref.child, *b = b_var->deref.child;
74 a != NULL; a = a->child, b = b->child) {
75 if (a->deref_type != b->deref_type)
76 return false;
77
78 if (a->deref_type == nir_deref_type_struct) {
79 if (nir_deref_as_struct(a)->index != nir_deref_as_struct(b)->index)
80 return false;
81 }
82 /* Do nothing for arrays. They're all the same. */
83
84 assert((a->child == NULL) == (b->child == NULL));
85 if((a->child == NULL) != (b->child == NULL))
86 return false;
87 }
88
89 return true;
90 }
91
92 static nir_register *
get_reg_for_deref(nir_deref_var * deref,struct locals_to_regs_state * state)93 get_reg_for_deref(nir_deref_var *deref, struct locals_to_regs_state *state)
94 {
95 uint32_t hash = hash_deref(deref);
96
97 assert(deref->var->constant_initializer == NULL);
98
99 struct hash_entry *entry =
100 _mesa_hash_table_search_pre_hashed(state->regs_table, hash, deref);
101 if (entry)
102 return entry->data;
103
104 unsigned array_size = 1;
105 nir_deref *tail = &deref->deref;
106 while (tail->child) {
107 if (tail->child->deref_type == nir_deref_type_array)
108 array_size *= glsl_get_length(tail->type);
109 tail = tail->child;
110 }
111
112 assert(glsl_type_is_vector(tail->type) || glsl_type_is_scalar(tail->type));
113
114 nir_register *reg = nir_local_reg_create(state->impl);
115 reg->num_components = glsl_get_vector_elements(tail->type);
116 reg->num_array_elems = array_size > 1 ? array_size : 0;
117 reg->bit_size = glsl_get_bit_size(tail->type);
118
119 _mesa_hash_table_insert_pre_hashed(state->regs_table, hash, deref, reg);
120
121 return reg;
122 }
123
124 static nir_src
get_deref_reg_src(nir_deref_var * deref,nir_instr * instr,struct locals_to_regs_state * state)125 get_deref_reg_src(nir_deref_var *deref, nir_instr *instr,
126 struct locals_to_regs_state *state)
127 {
128 nir_src src;
129
130 src.is_ssa = false;
131 src.reg.reg = get_reg_for_deref(deref, state);
132 src.reg.base_offset = 0;
133 src.reg.indirect = NULL;
134
135 /* It is possible for a user to create a shader that has an array with a
136 * single element and then proceed to access it indirectly. Indirectly
137 * accessing a non-array register is not allowed in NIR. In order to
138 * handle this case we just convert it to a direct reference.
139 */
140 if (src.reg.reg->num_array_elems == 0)
141 return src;
142
143 nir_deref *tail = &deref->deref;
144 while (tail->child != NULL) {
145 const struct glsl_type *parent_type = tail->type;
146 tail = tail->child;
147
148 if (tail->deref_type != nir_deref_type_array)
149 continue;
150
151 nir_deref_array *deref_array = nir_deref_as_array(tail);
152
153 src.reg.base_offset *= glsl_get_length(parent_type);
154 src.reg.base_offset += deref_array->base_offset;
155
156 if (src.reg.indirect) {
157 nir_load_const_instr *load_const =
158 nir_load_const_instr_create(state->shader, 1, 32);
159 load_const->value.u32[0] = glsl_get_length(parent_type);
160 nir_instr_insert_before(instr, &load_const->instr);
161
162 nir_alu_instr *mul = nir_alu_instr_create(state->shader, nir_op_imul);
163 mul->src[0].src = *src.reg.indirect;
164 mul->src[1].src.is_ssa = true;
165 mul->src[1].src.ssa = &load_const->def;
166 mul->dest.write_mask = 1;
167 nir_ssa_dest_init(&mul->instr, &mul->dest.dest, 1, 32, NULL);
168 nir_instr_insert_before(instr, &mul->instr);
169
170 src.reg.indirect->is_ssa = true;
171 src.reg.indirect->ssa = &mul->dest.dest.ssa;
172 }
173
174 if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
175 if (src.reg.indirect == NULL) {
176 src.reg.indirect = ralloc(state->shader, nir_src);
177 nir_src_copy(src.reg.indirect, &deref_array->indirect,
178 state->shader);
179 } else {
180 nir_alu_instr *add = nir_alu_instr_create(state->shader,
181 nir_op_iadd);
182 add->src[0].src = *src.reg.indirect;
183 nir_src_copy(&add->src[1].src, &deref_array->indirect, add);
184 add->dest.write_mask = 1;
185 nir_ssa_dest_init(&add->instr, &add->dest.dest, 1, 32, NULL);
186 nir_instr_insert_before(instr, &add->instr);
187
188 src.reg.indirect->is_ssa = true;
189 src.reg.indirect->ssa = &add->dest.dest.ssa;
190 }
191 }
192 }
193
194 return src;
195 }
196
197 static bool
lower_locals_to_regs_block(nir_block * block,struct locals_to_regs_state * state)198 lower_locals_to_regs_block(nir_block *block,
199 struct locals_to_regs_state *state)
200 {
201 nir_foreach_instr_safe(instr, block) {
202 if (instr->type != nir_instr_type_intrinsic)
203 continue;
204
205 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
206
207 switch (intrin->intrinsic) {
208 case nir_intrinsic_load_var: {
209 if (intrin->variables[0]->var->data.mode != nir_var_local)
210 continue;
211
212 nir_alu_instr *mov = nir_alu_instr_create(state->shader, nir_op_imov);
213 mov->src[0].src = get_deref_reg_src(intrin->variables[0],
214 &intrin->instr, state);
215 mov->dest.write_mask = (1 << intrin->num_components) - 1;
216 if (intrin->dest.is_ssa) {
217 nir_ssa_dest_init(&mov->instr, &mov->dest.dest,
218 intrin->num_components,
219 intrin->dest.ssa.bit_size, NULL);
220 nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
221 nir_src_for_ssa(&mov->dest.dest.ssa));
222 } else {
223 nir_dest_copy(&mov->dest.dest, &intrin->dest, &mov->instr);
224 }
225 nir_instr_insert_before(&intrin->instr, &mov->instr);
226
227 nir_instr_remove(&intrin->instr);
228 state->progress = true;
229 break;
230 }
231
232 case nir_intrinsic_store_var: {
233 if (intrin->variables[0]->var->data.mode != nir_var_local)
234 continue;
235
236 nir_src reg_src = get_deref_reg_src(intrin->variables[0],
237 &intrin->instr, state);
238
239 nir_alu_instr *mov = nir_alu_instr_create(state->shader, nir_op_imov);
240 nir_src_copy(&mov->src[0].src, &intrin->src[0], mov);
241 mov->dest.write_mask = nir_intrinsic_write_mask(intrin);
242 mov->dest.dest.is_ssa = false;
243 mov->dest.dest.reg.reg = reg_src.reg.reg;
244 mov->dest.dest.reg.base_offset = reg_src.reg.base_offset;
245 mov->dest.dest.reg.indirect = reg_src.reg.indirect;
246
247 nir_instr_insert_before(&intrin->instr, &mov->instr);
248
249 nir_instr_remove(&intrin->instr);
250 state->progress = true;
251 break;
252 }
253
254 case nir_intrinsic_copy_var:
255 unreachable("There should be no copies whatsoever at this point");
256 break;
257
258 default:
259 continue;
260 }
261 }
262
263 return true;
264 }
265
266 static bool
nir_lower_locals_to_regs_impl(nir_function_impl * impl)267 nir_lower_locals_to_regs_impl(nir_function_impl *impl)
268 {
269 struct locals_to_regs_state state;
270
271 state.shader = impl->function->shader;
272 state.impl = impl;
273 state.progress = false;
274 state.regs_table = _mesa_hash_table_create(NULL, hash_deref, derefs_equal);
275
276 nir_metadata_require(impl, nir_metadata_dominance);
277
278 nir_foreach_block(block, impl) {
279 lower_locals_to_regs_block(block, &state);
280 }
281
282 nir_metadata_preserve(impl, nir_metadata_block_index |
283 nir_metadata_dominance);
284
285 _mesa_hash_table_destroy(state.regs_table, NULL);
286
287 return state.progress;
288 }
289
290 bool
nir_lower_locals_to_regs(nir_shader * shader)291 nir_lower_locals_to_regs(nir_shader *shader)
292 {
293 bool progress = false;
294
295 nir_foreach_function(function, shader) {
296 if (function->impl)
297 progress = nir_lower_locals_to_regs_impl(function->impl) || progress;
298 }
299
300 return progress;
301 }
302