1 /**************************************************************************
2 *
3 * Copyright 2017 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <stdio.h>
29
30 #include "pipe/p_video_codec.h"
31
32 #include "util/u_video.h"
33 #include "util/u_memory.h"
34
35 #include "vl/vl_video_buffer.h"
36
37 #include "radeonsi/si_pipe.h"
38 #include "radeon_video.h"
39 #include "radeon_vcn_enc.h"
40
radeon_vcn_enc_get_param(struct radeon_encoder * enc,struct pipe_h264_enc_picture_desc * pic)41 static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
42 {
43 enc->enc_pic.picture_type = pic->picture_type;
44 enc->enc_pic.frame_num = pic->frame_num;
45 enc->enc_pic.pic_order_cnt = pic->pic_order_cnt;
46 enc->enc_pic.pic_order_cnt_type = pic->pic_order_cnt_type;
47 enc->enc_pic.ref_idx_l0 = pic->ref_idx_l0;
48 enc->enc_pic.ref_idx_l1 = pic->ref_idx_l1;
49 enc->enc_pic.not_referenced = pic->not_referenced;
50 enc->enc_pic.is_idr = (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR);
51 enc->enc_pic.crop_left = 0;
52 enc->enc_pic.crop_right = (align(enc->base.width, 16) - enc->base.width) / 2;
53 enc->enc_pic.crop_top = 0;
54 enc->enc_pic.crop_bottom = (align(enc->base.height, 16) - enc->base.height) / 2;
55 }
56
flush(struct radeon_encoder * enc)57 static void flush(struct radeon_encoder *enc)
58 {
59 enc->ws->cs_flush(enc->cs, PIPE_FLUSH_ASYNC, NULL);
60 }
61
radeon_enc_flush(struct pipe_video_codec * encoder)62 static void radeon_enc_flush(struct pipe_video_codec *encoder)
63 {
64 struct radeon_encoder *enc = (struct radeon_encoder*)encoder;
65 flush(enc);
66 }
67
radeon_enc_cs_flush(void * ctx,unsigned flags,struct pipe_fence_handle ** fence)68 static void radeon_enc_cs_flush(void *ctx, unsigned flags,
69 struct pipe_fence_handle **fence)
70 {
71 // just ignored
72 }
73
get_cpb_num(struct radeon_encoder * enc)74 static unsigned get_cpb_num(struct radeon_encoder *enc)
75 {
76 unsigned w = align(enc->base.width, 16) / 16;
77 unsigned h = align(enc->base.height, 16) / 16;
78 unsigned dpb;
79
80 switch (enc->base.level) {
81 case 10:
82 dpb = 396;
83 break;
84 case 11:
85 dpb = 900;
86 break;
87 case 12:
88 case 13:
89 case 20:
90 dpb = 2376;
91 break;
92 case 21:
93 dpb = 4752;
94 break;
95 case 22:
96 case 30:
97 dpb = 8100;
98 break;
99 case 31:
100 dpb = 18000;
101 break;
102 case 32:
103 dpb = 20480;
104 break;
105 case 40:
106 case 41:
107 dpb = 32768;
108 break;
109 case 42:
110 dpb = 34816;
111 break;
112 case 50:
113 dpb = 110400;
114 break;
115 default:
116 case 51:
117 case 52:
118 dpb = 184320;
119 break;
120 }
121
122 return MIN2(dpb / (w * h), 16);
123 }
124
radeon_enc_begin_frame(struct pipe_video_codec * encoder,struct pipe_video_buffer * source,struct pipe_picture_desc * picture)125 static void radeon_enc_begin_frame(struct pipe_video_codec *encoder,
126 struct pipe_video_buffer *source,
127 struct pipe_picture_desc *picture)
128 {
129 struct radeon_encoder *enc = (struct radeon_encoder*)encoder;
130 struct vl_video_buffer *vid_buf = (struct vl_video_buffer *)source;
131 struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
132
133 radeon_vcn_enc_get_param(enc, pic);
134
135 enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
136 enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
137
138 enc->need_feedback = false;
139
140 if (!enc->stream_handle) {
141 struct rvid_buffer fb;
142 enc->stream_handle = si_vid_alloc_stream_handle();
143 enc->si = CALLOC_STRUCT(rvid_buffer);
144 si_vid_create_buffer(enc->screen, enc->si, 128 * 1024, PIPE_USAGE_STAGING);
145 si_vid_create_buffer(enc->screen, &fb, 4096, PIPE_USAGE_STAGING);
146 enc->fb = &fb;
147 enc->begin(enc, pic);
148 flush(enc);
149 si_vid_destroy_buffer(&fb);
150 }
151 }
152
radeon_enc_encode_bitstream(struct pipe_video_codec * encoder,struct pipe_video_buffer * source,struct pipe_resource * destination,void ** fb)153 static void radeon_enc_encode_bitstream(struct pipe_video_codec *encoder,
154 struct pipe_video_buffer *source,
155 struct pipe_resource *destination,
156 void **fb)
157 {
158 struct radeon_encoder *enc = (struct radeon_encoder*)encoder;
159 enc->get_buffer(destination, &enc->bs_handle, NULL);
160 enc->bs_size = destination->width0;
161
162 *fb = enc->fb = CALLOC_STRUCT(rvid_buffer);
163
164 if (!si_vid_create_buffer(enc->screen, enc->fb, 4096, PIPE_USAGE_STAGING)) {
165 RVID_ERR("Can't create feedback buffer.\n");
166 return;
167 }
168
169 enc->need_feedback = true;
170 enc->encode(enc);
171 }
172
radeon_enc_end_frame(struct pipe_video_codec * encoder,struct pipe_video_buffer * source,struct pipe_picture_desc * picture)173 static void radeon_enc_end_frame(struct pipe_video_codec *encoder,
174 struct pipe_video_buffer *source,
175 struct pipe_picture_desc *picture)
176 {
177 struct radeon_encoder *enc = (struct radeon_encoder*)encoder;
178 flush(enc);
179 }
180
radeon_enc_destroy(struct pipe_video_codec * encoder)181 static void radeon_enc_destroy(struct pipe_video_codec *encoder)
182 {
183 struct radeon_encoder *enc = (struct radeon_encoder*)encoder;
184
185 if (enc->stream_handle) {
186 struct rvid_buffer fb;
187 enc->need_feedback = false;
188 si_vid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
189 enc->fb = &fb;
190 enc->destroy(enc);
191 flush(enc);
192 si_vid_destroy_buffer(&fb);
193 }
194
195 si_vid_destroy_buffer(&enc->cpb);
196 enc->ws->cs_destroy(enc->cs);
197 FREE(enc);
198 }
199
radeon_enc_get_feedback(struct pipe_video_codec * encoder,void * feedback,unsigned * size)200 static void radeon_enc_get_feedback(struct pipe_video_codec *encoder,
201 void *feedback, unsigned *size)
202 {
203 struct radeon_encoder *enc = (struct radeon_encoder*)encoder;
204 struct rvid_buffer *fb = feedback;
205
206 if (size) {
207 uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, enc->cs, PIPE_TRANSFER_READ_WRITE);
208 if (ptr[1])
209 *size = ptr[6];
210 else
211 *size = 0;
212 enc->ws->buffer_unmap(fb->res->buf);
213 }
214
215 si_vid_destroy_buffer(fb);
216 FREE(fb);
217 }
218
radeon_create_encoder(struct pipe_context * context,const struct pipe_video_codec * templ,struct radeon_winsys * ws,radeon_enc_get_buffer get_buffer)219 struct pipe_video_codec *radeon_create_encoder(struct pipe_context *context,
220 const struct pipe_video_codec *templ,
221 struct radeon_winsys* ws,
222 radeon_enc_get_buffer get_buffer)
223 {
224 struct si_screen *sscreen = (struct si_screen *)context->screen;
225 struct r600_common_context *rctx = (struct r600_common_context*)context;
226 struct radeon_encoder *enc;
227 struct pipe_video_buffer *tmp_buf, templat = {};
228 struct radeon_surf *tmp_surf;
229 unsigned cpb_size;
230
231 enc = CALLOC_STRUCT(radeon_encoder);
232
233 if (!enc)
234 return NULL;
235
236 enc->alignment = 256;
237 enc->base = *templ;
238 enc->base.context = context;
239 enc->base.destroy = radeon_enc_destroy;
240 enc->base.begin_frame = radeon_enc_begin_frame;
241 enc->base.encode_bitstream = radeon_enc_encode_bitstream;
242 enc->base.end_frame = radeon_enc_end_frame;
243 enc->base.flush = radeon_enc_flush;
244 enc->base.get_feedback = radeon_enc_get_feedback;
245 enc->get_buffer = get_buffer;
246 enc->bits_in_shifter = 0;
247 enc->screen = context->screen;
248 enc->ws = ws;
249 enc->cs = ws->cs_create(rctx->ctx, RING_VCN_ENC, radeon_enc_cs_flush, enc);
250
251 if (!enc->cs) {
252 RVID_ERR("Can't get command submission context.\n");
253 goto error;
254 }
255
256 struct rvid_buffer si;
257 si_vid_create_buffer(enc->screen, &si, 128 * 1024, PIPE_USAGE_STAGING);
258 enc->si = &si;
259
260 templat.buffer_format = PIPE_FORMAT_NV12;
261 templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
262 templat.width = enc->base.width;
263 templat.height = enc->base.height;
264 templat.interlaced = false;
265
266 if (!(tmp_buf = context->create_video_buffer(context, &templat))) {
267 RVID_ERR("Can't create video buffer.\n");
268 goto error;
269 }
270
271 enc->cpb_num = get_cpb_num(enc);
272
273 if (!enc->cpb_num)
274 goto error;
275
276 get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
277
278 cpb_size = (sscreen->info.chip_class < GFX9) ?
279 align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) *
280 align(tmp_surf->u.legacy.level[0].nblk_y, 32) :
281 align(tmp_surf->u.gfx9.surf_pitch * tmp_surf->bpe, 256) *
282 align(tmp_surf->u.gfx9.surf_height, 32);
283
284 cpb_size = cpb_size * 3 / 2;
285 cpb_size = cpb_size * enc->cpb_num;
286 tmp_buf->destroy(tmp_buf);
287
288 if (!si_vid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
289 RVID_ERR("Can't create CPB buffer.\n");
290 goto error;
291 }
292
293 radeon_enc_1_2_init(enc);
294
295 return &enc->base;
296
297 error:
298 if (enc->cs)
299 enc->ws->cs_destroy(enc->cs);
300
301 si_vid_destroy_buffer(&enc->cpb);
302
303 FREE(enc);
304 return NULL;
305 }
306