1 /***********************************************************************
2 Copyright (c) 2006-2011, Skype Limited. All rights reserved.
3 Copyright (c) 2013 Parrot
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5 modification, are permitted provided that the following conditions
6 are met:
7 - Redistributions of source code must retain the above copyright notice,
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16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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26 POSSIBILITY OF SUCH DAMAGE.
27 ***********************************************************************/
28
29 #ifndef SILK_MACROS_ARMv5E_H
30 #define SILK_MACROS_ARMv5E_H
31
32 /* This macro only avoids the undefined behaviour from a left shift of
33 a negative value. It should only be used in macros that can't include
34 SigProc_FIX.h. In other cases, use silk_LSHIFT32(). */
35 #define SAFE_SHL(a,b) ((opus_int32)((opus_uint32)(a) << (b)))
36
37 /* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */
38 #undef silk_SMULWB
silk_SMULWB_armv5e(opus_int32 a,opus_int16 b)39 static OPUS_INLINE opus_int32 silk_SMULWB_armv5e(opus_int32 a, opus_int16 b)
40 {
41 int res;
42 __asm__(
43 "#silk_SMULWB\n\t"
44 "smulwb %0, %1, %2\n\t"
45 : "=r"(res)
46 : "r"(a), "r"(b)
47 );
48 return res;
49 }
50 #define silk_SMULWB(a, b) (silk_SMULWB_armv5e(a, b))
51
52 /* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */
53 #undef silk_SMLAWB
silk_SMLAWB_armv5e(opus_int32 a,opus_int32 b,opus_int16 c)54 static OPUS_INLINE opus_int32 silk_SMLAWB_armv5e(opus_int32 a, opus_int32 b,
55 opus_int16 c)
56 {
57 int res;
58 __asm__(
59 "#silk_SMLAWB\n\t"
60 "smlawb %0, %1, %2, %3\n\t"
61 : "=r"(res)
62 : "r"(b), "r"(c), "r"(a)
63 );
64 return res;
65 }
66 #define silk_SMLAWB(a, b, c) (silk_SMLAWB_armv5e(a, b, c))
67
68 /* (a32 * (b32 >> 16)) >> 16 */
69 #undef silk_SMULWT
silk_SMULWT_armv5e(opus_int32 a,opus_int32 b)70 static OPUS_INLINE opus_int32 silk_SMULWT_armv5e(opus_int32 a, opus_int32 b)
71 {
72 int res;
73 __asm__(
74 "#silk_SMULWT\n\t"
75 "smulwt %0, %1, %2\n\t"
76 : "=r"(res)
77 : "r"(a), "r"(b)
78 );
79 return res;
80 }
81 #define silk_SMULWT(a, b) (silk_SMULWT_armv5e(a, b))
82
83 /* a32 + (b32 * (c32 >> 16)) >> 16 */
84 #undef silk_SMLAWT
silk_SMLAWT_armv5e(opus_int32 a,opus_int32 b,opus_int32 c)85 static OPUS_INLINE opus_int32 silk_SMLAWT_armv5e(opus_int32 a, opus_int32 b,
86 opus_int32 c)
87 {
88 int res;
89 __asm__(
90 "#silk_SMLAWT\n\t"
91 "smlawt %0, %1, %2, %3\n\t"
92 : "=r"(res)
93 : "r"(b), "r"(c), "r"(a)
94 );
95 return res;
96 }
97 #define silk_SMLAWT(a, b, c) (silk_SMLAWT_armv5e(a, b, c))
98
99 /* (opus_int32)((opus_int16)(a3))) * (opus_int32)((opus_int16)(b32)) output have to be 32bit int */
100 #undef silk_SMULBB
silk_SMULBB_armv5e(opus_int32 a,opus_int32 b)101 static OPUS_INLINE opus_int32 silk_SMULBB_armv5e(opus_int32 a, opus_int32 b)
102 {
103 int res;
104 __asm__(
105 "#silk_SMULBB\n\t"
106 "smulbb %0, %1, %2\n\t"
107 : "=r"(res)
108 : "%r"(a), "r"(b)
109 );
110 return res;
111 }
112 #define silk_SMULBB(a, b) (silk_SMULBB_armv5e(a, b))
113
114 /* a32 + (opus_int32)((opus_int16)(b32)) * (opus_int32)((opus_int16)(c32)) output have to be 32bit int */
115 #undef silk_SMLABB
silk_SMLABB_armv5e(opus_int32 a,opus_int32 b,opus_int32 c)116 static OPUS_INLINE opus_int32 silk_SMLABB_armv5e(opus_int32 a, opus_int32 b,
117 opus_int32 c)
118 {
119 int res;
120 __asm__(
121 "#silk_SMLABB\n\t"
122 "smlabb %0, %1, %2, %3\n\t"
123 : "=r"(res)
124 : "%r"(b), "r"(c), "r"(a)
125 );
126 return res;
127 }
128 #define silk_SMLABB(a, b, c) (silk_SMLABB_armv5e(a, b, c))
129
130 /* (opus_int32)((opus_int16)(a32)) * (b32 >> 16) */
131 #undef silk_SMULBT
silk_SMULBT_armv5e(opus_int32 a,opus_int32 b)132 static OPUS_INLINE opus_int32 silk_SMULBT_armv5e(opus_int32 a, opus_int32 b)
133 {
134 int res;
135 __asm__(
136 "#silk_SMULBT\n\t"
137 "smulbt %0, %1, %2\n\t"
138 : "=r"(res)
139 : "r"(a), "r"(b)
140 );
141 return res;
142 }
143 #define silk_SMULBT(a, b) (silk_SMULBT_armv5e(a, b))
144
145 /* a32 + (opus_int32)((opus_int16)(b32)) * (c32 >> 16) */
146 #undef silk_SMLABT
silk_SMLABT_armv5e(opus_int32 a,opus_int32 b,opus_int32 c)147 static OPUS_INLINE opus_int32 silk_SMLABT_armv5e(opus_int32 a, opus_int32 b,
148 opus_int32 c)
149 {
150 int res;
151 __asm__(
152 "#silk_SMLABT\n\t"
153 "smlabt %0, %1, %2, %3\n\t"
154 : "=r"(res)
155 : "r"(b), "r"(c), "r"(a)
156 );
157 return res;
158 }
159 #define silk_SMLABT(a, b, c) (silk_SMLABT_armv5e(a, b, c))
160
161 /* add/subtract with output saturated */
162 #undef silk_ADD_SAT32
silk_ADD_SAT32_armv5e(opus_int32 a,opus_int32 b)163 static OPUS_INLINE opus_int32 silk_ADD_SAT32_armv5e(opus_int32 a, opus_int32 b)
164 {
165 int res;
166 __asm__(
167 "#silk_ADD_SAT32\n\t"
168 "qadd %0, %1, %2\n\t"
169 : "=r"(res)
170 : "%r"(a), "r"(b)
171 );
172 return res;
173 }
174 #define silk_ADD_SAT32(a, b) (silk_ADD_SAT32_armv5e(a, b))
175
176 #undef silk_SUB_SAT32
silk_SUB_SAT32_armv5e(opus_int32 a,opus_int32 b)177 static OPUS_INLINE opus_int32 silk_SUB_SAT32_armv5e(opus_int32 a, opus_int32 b)
178 {
179 int res;
180 __asm__(
181 "#silk_SUB_SAT32\n\t"
182 "qsub %0, %1, %2\n\t"
183 : "=r"(res)
184 : "r"(a), "r"(b)
185 );
186 return res;
187 }
188 #define silk_SUB_SAT32(a, b) (silk_SUB_SAT32_armv5e(a, b))
189
190 #undef silk_CLZ16
silk_CLZ16_armv5(opus_int16 in16)191 static OPUS_INLINE opus_int32 silk_CLZ16_armv5(opus_int16 in16)
192 {
193 int res;
194 __asm__(
195 "#silk_CLZ16\n\t"
196 "clz %0, %1;\n"
197 : "=r"(res)
198 : "r"(SAFE_SHL(in16,16)|0x8000)
199 );
200 return res;
201 }
202 #define silk_CLZ16(in16) (silk_CLZ16_armv5(in16))
203
204 #undef silk_CLZ32
silk_CLZ32_armv5(opus_int32 in32)205 static OPUS_INLINE opus_int32 silk_CLZ32_armv5(opus_int32 in32)
206 {
207 int res;
208 __asm__(
209 "#silk_CLZ32\n\t"
210 "clz %0, %1\n\t"
211 : "=r"(res)
212 : "r"(in32)
213 );
214 return res;
215 }
216 #define silk_CLZ32(in32) (silk_CLZ32_armv5(in32))
217
218 #undef SAFE_SHL
219
220 #endif /* SILK_MACROS_ARMv5E_H */
221