1 // Copyright 2012 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 #ifndef V8_IA32_SSE_INSTR_H_ 6 #define V8_IA32_SSE_INSTR_H_ 7 8 #define SSE2_INSTRUCTION_LIST(V) \ 9 V(packsswb, 66, 0F, 63) \ 10 V(packssdw, 66, 0F, 6B) \ 11 V(packuswb, 66, 0F, 67) \ 12 V(paddb, 66, 0F, FC) \ 13 V(paddw, 66, 0F, FD) \ 14 V(paddd, 66, 0F, FE) \ 15 V(paddsb, 66, 0F, EC) \ 16 V(paddsw, 66, 0F, ED) \ 17 V(paddusb, 66, 0F, DC) \ 18 V(paddusw, 66, 0F, DD) \ 19 V(pand, 66, 0F, DB) \ 20 V(pcmpeqb, 66, 0F, 74) \ 21 V(pcmpeqw, 66, 0F, 75) \ 22 V(pcmpeqd, 66, 0F, 76) \ 23 V(pcmpgtb, 66, 0F, 64) \ 24 V(pcmpgtw, 66, 0F, 65) \ 25 V(pcmpgtd, 66, 0F, 66) \ 26 V(pmaxsw, 66, 0F, EE) \ 27 V(pmaxub, 66, 0F, DE) \ 28 V(pminsw, 66, 0F, EA) \ 29 V(pminub, 66, 0F, DA) \ 30 V(pmullw, 66, 0F, D5) \ 31 V(por, 66, 0F, EB) \ 32 V(psllw, 66, 0F, F1) \ 33 V(pslld, 66, 0F, F2) \ 34 V(psraw, 66, 0F, E1) \ 35 V(psrad, 66, 0F, E2) \ 36 V(psrlw, 66, 0F, D1) \ 37 V(psrld, 66, 0F, D2) \ 38 V(psubb, 66, 0F, F8) \ 39 V(psubw, 66, 0F, F9) \ 40 V(psubd, 66, 0F, FA) \ 41 V(psubsb, 66, 0F, E8) \ 42 V(psubsw, 66, 0F, E9) \ 43 V(psubusb, 66, 0F, D8) \ 44 V(psubusw, 66, 0F, D9) \ 45 V(punpcklbw, 66, 0F, 60) \ 46 V(punpcklwd, 66, 0F, 61) \ 47 V(punpckldq, 66, 0F, 62) \ 48 V(punpcklqdq, 66, 0F, 6C) \ 49 V(punpckhbw, 66, 0F, 68) \ 50 V(punpckhwd, 66, 0F, 69) \ 51 V(punpckhdq, 66, 0F, 6A) \ 52 V(punpckhqdq, 66, 0F, 6D) \ 53 V(pxor, 66, 0F, EF) 54 55 #define SSSE3_INSTRUCTION_LIST(V) \ 56 V(phaddd, 66, 0F, 38, 02) \ 57 V(phaddw, 66, 0F, 38, 01) \ 58 V(pshufb, 66, 0F, 38, 00) \ 59 V(psignb, 66, 0F, 38, 08) \ 60 V(psignw, 66, 0F, 38, 09) \ 61 V(psignd, 66, 0F, 38, 0A) 62 63 #define SSE4_INSTRUCTION_LIST(V) \ 64 V(packusdw, 66, 0F, 38, 2B) \ 65 V(pminsb, 66, 0F, 38, 38) \ 66 V(pminsd, 66, 0F, 38, 39) \ 67 V(pminuw, 66, 0F, 38, 3A) \ 68 V(pminud, 66, 0F, 38, 3B) \ 69 V(pmaxsb, 66, 0F, 38, 3C) \ 70 V(pmaxsd, 66, 0F, 38, 3D) \ 71 V(pmaxuw, 66, 0F, 38, 3E) \ 72 V(pmaxud, 66, 0F, 38, 3F) \ 73 V(pmulld, 66, 0F, 38, 40) 74 75 #define SSE4_RM_INSTRUCTION_LIST(V) \ 76 V(pmovsxbw, 66, 0F, 38, 20) \ 77 V(pmovsxwd, 66, 0F, 38, 23) \ 78 V(pmovzxbw, 66, 0F, 38, 30) \ 79 V(pmovzxwd, 66, 0F, 38, 33) \ 80 V(ptest, 66, 0F, 38, 17) 81 82 #endif // V8_IA32_SSE_INSTR_H_ 83