1 // Copyright 2017 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #ifndef V8_WASM_BASELINE_ARM_LIFTOFF_ASSEMBLER_ARM_H_
6 #define V8_WASM_BASELINE_ARM_LIFTOFF_ASSEMBLER_ARM_H_
7
8 #include "src/wasm/baseline/liftoff-assembler.h"
9
10 #define BAILOUT(reason) bailout("arm " reason)
11
12 namespace v8 {
13 namespace internal {
14 namespace wasm {
15
PrepareStackFrame()16 int LiftoffAssembler::PrepareStackFrame() {
17 BAILOUT("PrepareStackFrame");
18 return 0;
19 }
20
PatchPrepareStackFrame(int offset,uint32_t stack_slots)21 void LiftoffAssembler::PatchPrepareStackFrame(int offset,
22 uint32_t stack_slots) {
23 BAILOUT("PatchPrepareStackFrame");
24 }
25
FinishCode()26 void LiftoffAssembler::FinishCode() { CheckConstPool(true, false); }
27
AbortCompilation()28 void LiftoffAssembler::AbortCompilation() { FinishCode(); }
29
LoadConstant(LiftoffRegister reg,WasmValue value,RelocInfo::Mode rmode)30 void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value,
31 RelocInfo::Mode rmode) {
32 BAILOUT("LoadConstant");
33 }
34
LoadFromInstance(Register dst,uint32_t offset,int size)35 void LiftoffAssembler::LoadFromInstance(Register dst, uint32_t offset,
36 int size) {
37 BAILOUT("LoadFromInstance");
38 }
39
SpillInstance(Register instance)40 void LiftoffAssembler::SpillInstance(Register instance) {
41 BAILOUT("SpillInstance");
42 }
43
FillInstanceInto(Register dst)44 void LiftoffAssembler::FillInstanceInto(Register dst) {
45 BAILOUT("FillInstanceInto");
46 }
47
Load(LiftoffRegister dst,Register src_addr,Register offset_reg,uint32_t offset_imm,LoadType type,LiftoffRegList pinned,uint32_t * protected_load_pc,bool is_load_mem)48 void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
49 Register offset_reg, uint32_t offset_imm,
50 LoadType type, LiftoffRegList pinned,
51 uint32_t* protected_load_pc, bool is_load_mem) {
52 BAILOUT("Load");
53 }
54
Store(Register dst_addr,Register offset_reg,uint32_t offset_imm,LiftoffRegister src,StoreType type,LiftoffRegList pinned,uint32_t * protected_store_pc,bool is_store_mem)55 void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
56 uint32_t offset_imm, LiftoffRegister src,
57 StoreType type, LiftoffRegList pinned,
58 uint32_t* protected_store_pc, bool is_store_mem) {
59 BAILOUT("Store");
60 }
61
LoadCallerFrameSlot(LiftoffRegister dst,uint32_t caller_slot_idx,ValueType type)62 void LiftoffAssembler::LoadCallerFrameSlot(LiftoffRegister dst,
63 uint32_t caller_slot_idx,
64 ValueType type) {
65 BAILOUT("LoadCallerFrameSlot");
66 }
67
MoveStackValue(uint32_t dst_index,uint32_t src_index,ValueType type)68 void LiftoffAssembler::MoveStackValue(uint32_t dst_index, uint32_t src_index,
69 ValueType type) {
70 BAILOUT("MoveStackValue");
71 }
72
Move(Register dst,Register src,ValueType type)73 void LiftoffAssembler::Move(Register dst, Register src, ValueType type) {
74 BAILOUT("Move Register");
75 }
76
Move(DoubleRegister dst,DoubleRegister src,ValueType type)77 void LiftoffAssembler::Move(DoubleRegister dst, DoubleRegister src,
78 ValueType type) {
79 BAILOUT("Move DoubleRegister");
80 }
81
Spill(uint32_t index,LiftoffRegister reg,ValueType type)82 void LiftoffAssembler::Spill(uint32_t index, LiftoffRegister reg,
83 ValueType type) {
84 BAILOUT("Spill register");
85 }
86
Spill(uint32_t index,WasmValue value)87 void LiftoffAssembler::Spill(uint32_t index, WasmValue value) {
88 BAILOUT("Spill value");
89 }
90
Fill(LiftoffRegister reg,uint32_t index,ValueType type)91 void LiftoffAssembler::Fill(LiftoffRegister reg, uint32_t index,
92 ValueType type) {
93 BAILOUT("Fill");
94 }
95
FillI64Half(Register,uint32_t half_index)96 void LiftoffAssembler::FillI64Half(Register, uint32_t half_index) {
97 BAILOUT("FillI64Half");
98 }
99
100 #define UNIMPLEMENTED_GP_BINOP(name) \
101 void LiftoffAssembler::emit_##name(Register dst, Register lhs, \
102 Register rhs) { \
103 BAILOUT("gp binop: " #name); \
104 }
105 #define UNIMPLEMENTED_I64_BINOP(name) \
106 void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister lhs, \
107 LiftoffRegister rhs) { \
108 BAILOUT("i64 binop: " #name); \
109 }
110 #define UNIMPLEMENTED_GP_UNOP(name) \
111 bool LiftoffAssembler::emit_##name(Register dst, Register src) { \
112 BAILOUT("gp unop: " #name); \
113 return true; \
114 }
115 #define UNIMPLEMENTED_FP_BINOP(name) \
116 void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister lhs, \
117 DoubleRegister rhs) { \
118 BAILOUT("fp binop: " #name); \
119 }
120 #define UNIMPLEMENTED_FP_UNOP(name) \
121 void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister src) { \
122 BAILOUT("fp unop: " #name); \
123 }
124 #define UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(name) \
125 bool LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister src) { \
126 BAILOUT("fp unop: " #name); \
127 return true; \
128 }
129 #define UNIMPLEMENTED_I32_SHIFTOP(name) \
130 void LiftoffAssembler::emit_##name(Register dst, Register src, \
131 Register amount, LiftoffRegList pinned) { \
132 BAILOUT("i32 shiftop: " #name); \
133 }
134 #define UNIMPLEMENTED_I64_SHIFTOP(name) \
135 void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister src, \
136 Register amount, LiftoffRegList pinned) { \
137 BAILOUT("i64 shiftop: " #name); \
138 }
139
140 UNIMPLEMENTED_GP_BINOP(i32_add)
UNIMPLEMENTED_GP_BINOP(i32_sub)141 UNIMPLEMENTED_GP_BINOP(i32_sub)
142 UNIMPLEMENTED_GP_BINOP(i32_mul)
143 UNIMPLEMENTED_GP_BINOP(i32_and)
144 UNIMPLEMENTED_GP_BINOP(i32_or)
145 UNIMPLEMENTED_GP_BINOP(i32_xor)
146 UNIMPLEMENTED_I32_SHIFTOP(i32_shl)
147 UNIMPLEMENTED_I32_SHIFTOP(i32_sar)
148 UNIMPLEMENTED_I32_SHIFTOP(i32_shr)
149 UNIMPLEMENTED_I64_BINOP(i64_add)
150 UNIMPLEMENTED_I64_BINOP(i64_sub)
151 UNIMPLEMENTED_I64_BINOP(i64_mul)
152 UNIMPLEMENTED_I64_SHIFTOP(i64_shl)
153 UNIMPLEMENTED_I64_SHIFTOP(i64_sar)
154 UNIMPLEMENTED_I64_SHIFTOP(i64_shr)
155 UNIMPLEMENTED_GP_UNOP(i32_clz)
156 UNIMPLEMENTED_GP_UNOP(i32_ctz)
157 UNIMPLEMENTED_GP_UNOP(i32_popcnt)
158 UNIMPLEMENTED_FP_BINOP(f32_add)
159 UNIMPLEMENTED_FP_BINOP(f32_sub)
160 UNIMPLEMENTED_FP_BINOP(f32_mul)
161 UNIMPLEMENTED_FP_BINOP(f32_div)
162 UNIMPLEMENTED_FP_BINOP(f32_min)
163 UNIMPLEMENTED_FP_BINOP(f32_max)
164 UNIMPLEMENTED_FP_UNOP(f32_abs)
165 UNIMPLEMENTED_FP_UNOP(f32_neg)
166 UNIMPLEMENTED_FP_UNOP(f32_ceil)
167 UNIMPLEMENTED_FP_UNOP(f32_floor)
168 UNIMPLEMENTED_FP_UNOP(f32_trunc)
169 UNIMPLEMENTED_FP_UNOP(f32_nearest_int)
170 UNIMPLEMENTED_FP_UNOP(f32_sqrt)
171 UNIMPLEMENTED_FP_BINOP(f64_add)
172 UNIMPLEMENTED_FP_BINOP(f64_sub)
173 UNIMPLEMENTED_FP_BINOP(f64_mul)
174 UNIMPLEMENTED_FP_BINOP(f64_div)
175 UNIMPLEMENTED_FP_BINOP(f64_min)
176 UNIMPLEMENTED_FP_BINOP(f64_max)
177 UNIMPLEMENTED_FP_UNOP(f64_abs)
178 UNIMPLEMENTED_FP_UNOP(f64_neg)
179 UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f64_ceil)
180 UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f64_floor)
181 UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f64_trunc)
182 UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f64_nearest_int)
183 UNIMPLEMENTED_FP_UNOP(f64_sqrt)
184
185 #undef UNIMPLEMENTED_GP_BINOP
186 #undef UNIMPLEMENTED_I64_BINOP
187 #undef UNIMPLEMENTED_GP_UNOP
188 #undef UNIMPLEMENTED_FP_BINOP
189 #undef UNIMPLEMENTED_FP_UNOP
190 #undef UNIMPLEMENTED_FP_UNOP_RETURN_TRUE
191 #undef UNIMPLEMENTED_I32_SHIFTOP
192 #undef UNIMPLEMENTED_I64_SHIFTOP
193
194 void LiftoffAssembler::emit_i32_divs(Register dst, Register lhs, Register rhs,
195 Label* trap_div_by_zero,
196 Label* trap_div_unrepresentable) {
197 BAILOUT("i32_divs");
198 }
199
emit_i32_divu(Register dst,Register lhs,Register rhs,Label * trap_div_by_zero)200 void LiftoffAssembler::emit_i32_divu(Register dst, Register lhs, Register rhs,
201 Label* trap_div_by_zero) {
202 BAILOUT("i32_divu");
203 }
204
emit_i32_rems(Register dst,Register lhs,Register rhs,Label * trap_div_by_zero)205 void LiftoffAssembler::emit_i32_rems(Register dst, Register lhs, Register rhs,
206 Label* trap_div_by_zero) {
207 BAILOUT("i32_rems");
208 }
209
emit_i32_remu(Register dst,Register lhs,Register rhs,Label * trap_div_by_zero)210 void LiftoffAssembler::emit_i32_remu(Register dst, Register lhs, Register rhs,
211 Label* trap_div_by_zero) {
212 BAILOUT("i32_remu");
213 }
214
emit_i64_divs(LiftoffRegister dst,LiftoffRegister lhs,LiftoffRegister rhs,Label * trap_div_by_zero,Label * trap_div_unrepresentable)215 bool LiftoffAssembler::emit_i64_divs(LiftoffRegister dst, LiftoffRegister lhs,
216 LiftoffRegister rhs,
217 Label* trap_div_by_zero,
218 Label* trap_div_unrepresentable) {
219 return false;
220 }
221
emit_i64_divu(LiftoffRegister dst,LiftoffRegister lhs,LiftoffRegister rhs,Label * trap_div_by_zero)222 bool LiftoffAssembler::emit_i64_divu(LiftoffRegister dst, LiftoffRegister lhs,
223 LiftoffRegister rhs,
224 Label* trap_div_by_zero) {
225 return false;
226 }
227
emit_i64_rems(LiftoffRegister dst,LiftoffRegister lhs,LiftoffRegister rhs,Label * trap_div_by_zero)228 bool LiftoffAssembler::emit_i64_rems(LiftoffRegister dst, LiftoffRegister lhs,
229 LiftoffRegister rhs,
230 Label* trap_div_by_zero) {
231 return false;
232 }
233
emit_i64_remu(LiftoffRegister dst,LiftoffRegister lhs,LiftoffRegister rhs,Label * trap_div_by_zero)234 bool LiftoffAssembler::emit_i64_remu(LiftoffRegister dst, LiftoffRegister lhs,
235 LiftoffRegister rhs,
236 Label* trap_div_by_zero) {
237 return false;
238 }
239
emit_i32_to_intptr(Register dst,Register src)240 void LiftoffAssembler::emit_i32_to_intptr(Register dst, Register src) {
241 // This is a nop on arm.
242 }
243
emit_type_conversion(WasmOpcode opcode,LiftoffRegister dst,LiftoffRegister src,Label * trap)244 bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
245 LiftoffRegister dst,
246 LiftoffRegister src, Label* trap) {
247 BAILOUT("emit_type_conversion");
248 return true;
249 }
250
emit_jump(Label * label)251 void LiftoffAssembler::emit_jump(Label* label) { BAILOUT("emit_jump"); }
252
emit_jump(Register target)253 void LiftoffAssembler::emit_jump(Register target) { BAILOUT("emit_jump"); }
254
emit_cond_jump(Condition cond,Label * label,ValueType type,Register lhs,Register rhs)255 void LiftoffAssembler::emit_cond_jump(Condition cond, Label* label,
256 ValueType type, Register lhs,
257 Register rhs) {
258 BAILOUT("emit_cond_jump");
259 }
260
emit_i32_eqz(Register dst,Register src)261 void LiftoffAssembler::emit_i32_eqz(Register dst, Register src) {
262 BAILOUT("emit_i32_eqz");
263 }
264
emit_i32_set_cond(Condition cond,Register dst,Register lhs,Register rhs)265 void LiftoffAssembler::emit_i32_set_cond(Condition cond, Register dst,
266 Register lhs, Register rhs) {
267 BAILOUT("emit_i32_set_cond");
268 }
269
emit_i64_eqz(Register dst,LiftoffRegister src)270 void LiftoffAssembler::emit_i64_eqz(Register dst, LiftoffRegister src) {
271 BAILOUT("emit_i64_eqz");
272 }
273
emit_i64_set_cond(Condition cond,Register dst,LiftoffRegister lhs,LiftoffRegister rhs)274 void LiftoffAssembler::emit_i64_set_cond(Condition cond, Register dst,
275 LiftoffRegister lhs,
276 LiftoffRegister rhs) {
277 BAILOUT("emit_i64_set_cond");
278 }
279
emit_f32_set_cond(Condition cond,Register dst,DoubleRegister lhs,DoubleRegister rhs)280 void LiftoffAssembler::emit_f32_set_cond(Condition cond, Register dst,
281 DoubleRegister lhs,
282 DoubleRegister rhs) {
283 BAILOUT("emit_f32_set_cond");
284 }
285
emit_f64_set_cond(Condition cond,Register dst,DoubleRegister lhs,DoubleRegister rhs)286 void LiftoffAssembler::emit_f64_set_cond(Condition cond, Register dst,
287 DoubleRegister lhs,
288 DoubleRegister rhs) {
289 BAILOUT("emit_f64_set_cond");
290 }
291
StackCheck(Label * ool_code,Register limit_address)292 void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {
293 BAILOUT("StackCheck");
294 }
295
CallTrapCallbackForTesting()296 void LiftoffAssembler::CallTrapCallbackForTesting() {
297 BAILOUT("CallTrapCallbackForTesting");
298 }
299
AssertUnreachable(AbortReason reason)300 void LiftoffAssembler::AssertUnreachable(AbortReason reason) {
301 BAILOUT("AssertUnreachable");
302 }
303
PushRegisters(LiftoffRegList regs)304 void LiftoffAssembler::PushRegisters(LiftoffRegList regs) {
305 BAILOUT("PushRegisters");
306 }
307
PopRegisters(LiftoffRegList regs)308 void LiftoffAssembler::PopRegisters(LiftoffRegList regs) {
309 BAILOUT("PopRegisters");
310 }
311
DropStackSlotsAndRet(uint32_t num_stack_slots)312 void LiftoffAssembler::DropStackSlotsAndRet(uint32_t num_stack_slots) {
313 BAILOUT("DropStackSlotsAndRet");
314 }
315
CallC(wasm::FunctionSig * sig,const LiftoffRegister * args,const LiftoffRegister * rets,ValueType out_argument_type,int stack_bytes,ExternalReference ext_ref)316 void LiftoffAssembler::CallC(wasm::FunctionSig* sig,
317 const LiftoffRegister* args,
318 const LiftoffRegister* rets,
319 ValueType out_argument_type, int stack_bytes,
320 ExternalReference ext_ref) {
321 BAILOUT("CallC");
322 }
323
CallNativeWasmCode(Address addr)324 void LiftoffAssembler::CallNativeWasmCode(Address addr) {
325 BAILOUT("CallNativeWasmCode");
326 }
327
CallIndirect(wasm::FunctionSig * sig,compiler::CallDescriptor * call_descriptor,Register target)328 void LiftoffAssembler::CallIndirect(wasm::FunctionSig* sig,
329 compiler::CallDescriptor* call_descriptor,
330 Register target) {
331 BAILOUT("CallIndirect");
332 }
333
CallRuntimeStub(WasmCode::RuntimeStubId sid)334 void LiftoffAssembler::CallRuntimeStub(WasmCode::RuntimeStubId sid) {
335 BAILOUT("CallRuntimeStub");
336 }
337
AllocateStackSlot(Register addr,uint32_t size)338 void LiftoffAssembler::AllocateStackSlot(Register addr, uint32_t size) {
339 BAILOUT("AllocateStackSlot");
340 }
341
DeallocateStackSlot(uint32_t size)342 void LiftoffAssembler::DeallocateStackSlot(uint32_t size) {
343 BAILOUT("DeallocateStackSlot");
344 }
345
Construct()346 void LiftoffStackSlots::Construct() {
347 asm_->BAILOUT("LiftoffStackSlots::Construct");
348 }
349
350 } // namespace wasm
351 } // namespace internal
352 } // namespace v8
353
354 #undef BAILOUT
355
356 #endif // V8_WASM_BASELINE_ARM_LIFTOFF_ASSEMBLER_ARM_H_
357