Searched refs:A7 (Results 1 – 7 of 7) sorted by relevance
| /art/runtime/arch/mips64/ |
| D | registers_mips64.h | 39 A7 = 11, enumerator
|
| D | callee_save_frame_mips64.h | 40 (1 << art::mips64::A7);
47 (1 << art::mips64::A6) | (1 << art::mips64::A7) | (1 << art::mips64::T0) |
|
| D | context_mips64.cc | 83 gprs_[A7] = nullptr; in SmashCallerSaves()
|
| /art/compiler/jni/quick/mips64/ |
| D | calling_convention_mips64.cc | 32 A0, A1, A2, A3, A4, A5, A6, A7
|
| /art/compiler/optimizing/ |
| D | code_generator_mips64.h | 33 { A1, A2, A3, A4, A5, A6, A7 };
44 { A0, A1, A2, A3, A4, A5, A6, A7 };
|
| /art/compiler/utils/mips64/ |
| D | managed_register_mips64_test.cc | 60 reg = Mips64ManagedRegister::FromGpuRegister(A7); in TEST()
65 EXPECT_EQ(A7, reg.AsGpuRegister()); in TEST()
|
| D | assembler_mips64_test.cc | 113 registers_.push_back(new mips64::GpuRegister(mips64::A7)); in SetUpHelpers()
146 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A7), "a7"); in SetUpHelpers()
|