Searched refs:AsArm (Results 1 – 6 of 6) sorted by relevance
86 CHECK(r0.Is(AsVIXLRegister(method_reg.AsArm()))); in BuildFrame()92 if (reg.AsArm().IsCoreRegister()) { in BuildFrame()93 core_spill_mask |= 1 << reg.AsArm().AsCoreRegister(); in BuildFrame()95 fp_spill_mask |= 1 << reg.AsArm().AsSRegister(); in BuildFrame()124 ArmManagedRegister reg = spill.AsArm(); in BuildFrame()151 if (reg.AsArm().IsCoreRegister()) { in RemoveFrame()152 core_spill_mask |= 1 << reg.AsArm().AsCoreRegister(); in RemoveFrame()154 fp_spill_mask |= 1 << reg.AsArm().AsSRegister(); in RemoveFrame()227 ArmManagedRegister src = m_src.AsArm(); in Store()250 vixl::aarch32::Register src = AsVIXLRegister(msrc.AsArm()); in StoreRef()[all …]
267 constexpr inline arm::ArmManagedRegister ManagedRegister::AsArm() const { in AsArm() function
239 vixl32::Label* AsArm() { in AsArm() function
25 ArmManagedRegister reg = ManagedRegister::NoRegister().AsArm(); in TEST()
100 if (r.AsArm().IsCoreRegister()) { in CalculateCoreCalleeSpillMask()101 result |= (1 << r.AsArm().AsCoreRegister()); in CalculateCoreCalleeSpillMask()110 if (r.AsArm().IsSRegister()) { in CalculateFpCalleeSpillMask()111 result |= (1 << r.AsArm().AsSRegister()); in CalculateFpCalleeSpillMask()
57 constexpr arm::ArmManagedRegister AsArm() const;